ADN4604ASVZ-RL Analog Devices Inc, ADN4604ASVZ-RL Datasheet - Page 24

• Manufacturer Part Number: ADN4604ASVZ-RL
• Description: 4.25Gbps 16x16 Crossbar Switch
• Manufacturer: Analog Devices Inc
• Series: XStream™r

Specifications of ADN4604ASVZ-RL

• Function: Crosspoint Switch
• Circuit: 1 x 16:16
• On-state Resistance: 56 Ohm
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 2.7 V ~ 3.6 V
• Current - Supply: 95mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADN4604
I
The ADN4604 register set is controlled through a 2-wire I
interface. The ADN4604 acts only as an I
the I
configure the ADN4604 and other I
the bus.
The ADN4604 I
(100 kHz) and fast (400 kHz) modes. The SDA line only
changes value when the SCL pin is low with two exceptions. To
indicate the beginning or continuation of a transfer, the SDA
pin is driven low while the SCL pin is high; to indicate the end
of a transfer, the SDA line is driven high while the SCL line is
high. Therefore, it is important to control the SCL clock to
toggle only when the SDA line is stable unless indicating a start,
repeated start, or stop condition.
Table 17. I
ADDR1 Pin
0
0
1
1
RESET
On initial power-up, or at any point in operation, the ADN4604
register set can be restored to the default values by pulling the
RESET pin to low according to the specification in
During normal operation, however, the
pulled up to DV
value 0x01 to the Reset register at Address 0x00. This register is
write only.
I
To write data to the ADN4604 register set, a microcontroller,
signals to the ADN4604 slave device. The steps to be followed
are listed below; the signals are controlled by the I
unless otherwise specified. A diagram of the procedure is
shown in Figure 46.
or any other I
2
2
C DATA WRITE
C SERIAL CONTROL INTERFACE
2
C bus in the system needs to include an I
EXAMPLE
2
SDA
SDA
C Device Address Assignment
SCL
2
C master, must send the appropriate control
2
CC
START
C interface can be run in the standard
. A software reset is available by writing the
ADDR0 Pin
0
1
0
1
1
b10010
2
2
C devices that may be on
I
0x90
0x92
0x94
0x96
2
2
C Device Address
C slave device. Therefore,
RESET pin must be
ADDR
[1:0]
2
2
C master to
2
C master,
R/W ACK
Table 2.
3
4
Figure 46. I
2
C
Rev. 0 | Page 24 of 40
REGISTER ADDR
2
C Write Diagram
5
1.
2.
3.
4.
5.
6.
7.
8.
9.
The ADN4604 write process is shown in Figure 46. The SCL
signal is shown along with a general write operation and a
specific example. In the example, data 0x92 is written to
Address 0x6D of an ADN4604 part with a part address of 0x4B.
It is important to note that the SDA line only changes when the
SCL line is low, except for the case of sending a start, stop, or
repeated start condition, Step 1 and Step 9 in this case.
Send a start condition (while holding the SCL line high,
pull the SDA line low).
Send the ADN4604 part address (seven bits) whose upper
four bits are the static value b10010 and whose lower three
bits are controlled by the input pins I2C_A[1:0]. This
transfer should be MSB first.
Send the write indicator bit (0).
Wait for the ADN4604 to acknowledge the request.
Send the register address (eight bits) to which data is to be
written. This transfer should be MSB first.
Wait for the ADN4604 to acknowledge the request.
Send the data (eight bits) to be written to the register
whose address was set in Step 5. This transfer should be
MSB first.
Wait for the ADN4604 to acknowledge the request.
Do one or more of the following:
a.
b.
c.
d.
Send a stop condition (while holding the SCL line high,
pull the SDA line high) and release control of the bus.
Send a repeated start condition (while holding the
SCL line high, pull the SDA line low) and continue
with Step 2 of the write procedure to perform a write.
Send a repeated start condition (while holding the
SCL line high, pull the SDA line low) and continue
with Step 2 of this procedure to perform a read from
another address.
Send a repeated start condition (while holding the
SCL line high, pull the SDA line low) and continue
with Step 8 of the read procedure (in the I2C Data
Read section) to perform a read from the same
address set in Step 5.
ACK
6
DATA
7
ACK
8
STOP
9a