ADF4157BRUZ-RL Analog Devices Inc, ADF4157BRUZ-RL Datasheet - Page 6

• Manufacturer Part Number: ADF4157BRUZ-RL
• Description: IC,FREQUENCY SYNTHESIZER,CMOS,TSSOP,16PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Fractional N Synthesizer (RF)r

Specifications of ADF4157BRUZ-RL

• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 6GHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 2.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 6GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF4157EB1Z - BOARD EVALUATION FOR ADF4157
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADF4157
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 5. Pin Function Descriptions
TSSOP
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
LFCSP
Pin No.
19
20
1
2, 3
4
5
6, 7
8
9, 10
11
12
13
14
15
CPGND
AGND
RF
RF
REF
AV
R
Figure 3. TSSOP Pin Configuration
SET
IN
IN
CP
DD
IN
B
A
1
2
3
4
5
6
7
8
Mnemonic
R
CP
CPGND
AGND
RF
RF
AV
REF
DGND
CE
CLK
DATA
LE
MUXOUT
(Not to Scale)
ADF4157
SET
TOP VIEW
IN
IN
DD
IN
B
A
16
15
14
13
12
11
10
9
V
DV
MUXOUT
LE
DATA
CLK
CE
DGND
P
DD
Description
Connecting a resistor between this pin and ground sets the maximum charge pump output
current.
The relationship between I
where:
R
I
Charge Pump Output. When enabled, this pin provides ±I
turn, drives the external VCO.
Charge Pump Ground. This is the ground return path for the charge pump.
Analog Ground. This is the ground return path of the prescaler.
Complementary Input to the RF Prescaler. This point should be decoupled to the ground plane
with a small bypass capacitor, typically 100 pF.
Input to the RF Prescaler. This small-signal input is normally ac-coupled from the VCO.
Positive Power Supply for the RF Section. Decoupling capacitors to the digital ground plane
should be placed as close as possible to this pin. AV
the same voltage as DV
Reference Input. This is a CMOS input with a nominal threshold of V
input resistance of 100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator, or it
can be ac-coupled.
Digital Ground.
Chip Enable. A logic low on this pin powers down the device and puts the charge pump output
into three-state mode.
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is
latched into the input shift register on the CLK rising edge. This input is a high impedance
CMOS input.
Serial Data Input. The serial data is loaded MSB first with the three LSBs being the control bits.
This input is a high impedance CMOS input.
Load Enable, CMOS Input. When LE is high, the data stored in the input shift register is loaded
into one of the five latches, with the latch selected using the control bits.
This multiplexer output allows the lock detect, the scaled RF, or the scaled reference frequency
to be accessed externally.
CPMAX
SET
= 5.1 kΩ.
I
= 5 mA.
CPMAX
=
25
R
SET
5 .
Rev. A | Page 6 of 24
DD
.
CP
and R
SET
is
NOTES
1. IT IS RECOMMENDED THAT THE EXPOSED PAD
BE THERMALLY CONNECTED TO A COPPER
PLANE FOR ENHANCED THERMAL PERFORMANCE.
THE PAD SHOULD BE GROUNDED AS WELL.
CPGND
AGND
AGND
RF
RF
Figure 4. LFCSP Pin Configuration
IN
IN
B
A
DD
1
2
3
4
5
has a value of 3 V ± 10%. AV
CP
(Not to Scale)
ADF4157
TOP VIEW
to the external loop filter, which, in
PIN 1
INDICATOR
DD
/2 and an equivalent
15 MUXOUT
14 LE
13 DATA
12 CLK
11 CE
DD
must have