AD9983A/PCBZ Analog Devices Inc, AD9983A/PCBZ Datasheet - Page 14

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AD9983A/PCBZ

Manufacturer Part Number
AD9983A/PCBZ
Description
Pb-free EVALUATION Kit AD9983A
Manufacturer
Analog Devices Inc
Series
Advantiv®r
Datasheet

Specifications of AD9983A/PCBZ

Main Purpose
Video, Video Processing
Embedded
No
Utilized Ic / Part
AD9983A
Primary Attributes
3 x 8-Bit 140 MSPS ADC's
Secondary Attributes
Integrated PLL & VCO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9983A
The polarity of the coast signal may be set through the coast
polarity register (Register 0x18, Bits[6:5]). Also, the polarity of
the Hsync signal can be set through the Hsync polarity register
(Register 0x12, Bits[5:4]). For both Hsync and coast, a value of 1
Table 10. Recommended VCO Range and Charge Pump and Current Settings for Standard Display Formats
Standard
VGA
SVGA
XGA
SXGA
TV
Resolution
640 × 480
800 × 600
1024 × 768
1280 × 1024
480i
480p
576i
576p
720p
1035i
1080i
Refresh Rate
(Hz)
60
72
75
85
56
60
72
75
85
60
70
75
80
85
60
75
30
60
30
60
60
30
60
Horizontal
Frequency (kHz)
31.500
37.700
37.500
43.300
35.100
37.900
48.100
46.900
53.700
48.400
56.500
60.000
64.000
68.300
64.000
80.000
15.750
31.470
15.625
31.250
45.000
33.750
33.750
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Pixel Rate (MHz)
25.175
31.500
31.500
36.000
36.000
40.000
50.000
49.500
56.250
65.000
75.000
78.750
85.500
94.500
108.000
135.000
13.510
27.000
13.500
27.000
74.250
74.250
74.250
is active high. The internal coast function is driven off the
Vsync signal, which is typically a time when Hsync signals may
be disrupted with extra equalization pulses.
PLL Divider
800
832
840
832
1024
1056
1040
1056
1048
1344
1328
1312
1336
1376
1688
1688
858
858
864
864
1650
2200
2200
VCO
Range
00
01
01
01
01
01
01
01
01
10
10
10
10
10
10
11
00
00
00
00
10
10
10
Current
101
100
100
100
100
101
101
101
110
100
101
101
101
110
110
110
101
101
101
101
101
101
101
VCO Gear
(R0x36[0])
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0

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