AD9852/PCBZ Analog Devices Inc, AD9852/PCBZ Datasheet - Page 14

300 Mhz C-DDS Synthesizer Eval Board

AD9852/PCBZ

Manufacturer Part Number
AD9852/PCBZ
Description
300 Mhz C-DDS Synthesizer Eval Board
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Type
Synthesizerr
Datasheet

Specifications of AD9852/PCBZ

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
AD9852
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9852
Figure 18 and Figure 19 show the residual phase noise performance of the AD9852 when operating with a 300 MHz reference clock with
the REFCLK multiplier bypassed vs. a 30 MHz reference clock with the REFCLK multiplier enabled at 10×.
Figure 16. A Slight Change in Tuning Word Yields Dramatically Better Results;
112.469 MHz with All Spurs Shifted Out-of-Band, 300 MHz REFCLK
–100
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
0
0
CENTER 112.469MHz
CENTER 39.1MHz
10
Figure 17. Narrow-Band SFDR, 39.1 MHz, 50 kHz BW,
200 MHz REFCLK with REFCLK Multiplier Bypassed
300 MHz REFCLK with REFCLK Multiplier Bypassed
A
100
Figure 18. Residual Phase Noise,
OUT
= 5MHz
FREQUENCY (Hz)
1k
50kHz/
5kHz/
A
OUT
= 80MHz
10k
SPAN 500kHz
100k
SPAN 50kHz
1M
Rev. E | Page 14 of 52
Figure 21. Supply Current vs. Output Frequency (Variation Is Minimal,
Expressed as a Percentage, and Heavily Dependent on Tuning Word)
–100
–110
–120
–130
–140
–150
–160
620
615
610
605
600
595
590
–90
55
54
53
52
51
50
49
48
0
0
10
300 MHz REFCLK with REFCLK Multiplier Bypassed
A
30 MHz REFCLK with REFCLK Multiplier = 10×
OUT
Figure 20. SFDR vs. DAC Current, 59.1 A
20
= 5MHz
5
100
Figure 19. Residual Phase Noise,
40
A
DAC CURRENT (mA)
FREQUENCY (MHz)
OUT
FREQUENCY (Hz)
10
1k
60
= 80MHz
80
15
10k
100
20
100k
OUT
120
,
140
25
1M

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