AD9779A-DPG2-EBZ Analog Devices Inc, AD9779A-DPG2-EBZ Datasheet - Page 37

• Manufacturer Part Number: AD9779A-DPG2-EBZ
• Description: Dual 16B, 1.0 GSPS TxDAC
• Manufacturer: Analog Devices Inc

Specifications of AD9779A-DPG2-EBZ

• Design Resources: Interfacing ADL5370 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0016) Interfacing ADL5371 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0017) Interfacing ADL5372 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0018) Interfacing ADL5373 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0019) Interfacing ADL5374 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0020) Interfacing ADL5375 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0021)
• Number Of Dac's: 2
• Number Of Bits: 16
• Outputs And Type: 2, Differential
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9779A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 21. Typical VCO Frequency Range vs. PLL Band Select Value
PLL Band Select
111111 (63)
111110 (62)
111101 (61)
111100 (60)
111011 (59)
111010 (58)
111001 (57)
111000 (56)
110111 (55)
110110 (54)
110101 (53)
110100 (52)
110011 (51)
110010 (50)
110001 (49)
110000 (48)
101111 (47)
101110 (46)
101101 (45)
101100 (44)
101011 (43)
101010 (42)
101001 (41)
101000 (40)
100111 (39)
100110 (38)
100101 (37)
100100 (36)
100011 (35)
100010 (34)
100001 (33)
100000 (32)
011111 (31)
011110 (30)
011101 (29)
011100 (28)
011011 (27)
011010 (26)
011001 (25)
011000 (24)
010111 (23)
010110 (22)
010101 (21)
010100 (20)
010011 (19)
010010 (18)
PLL Lock Ranges over Temperature, −40°C to +85°C
f
1975
1956
1938
1923
1902
1883
1870
1848
1830
1822
1794
1779
1774
1748
1729
1730
1699
1685
1684
1651
1640
1604
1596
1564
1555
1521
1514
1480
1475
1439
1435
1402
1397
1361
1356
1324
1317
1287
1282
1250
1245
1215
1210
1182
1174
LOW
VCO Frequency Range in MHz
Auto mode
f
2026
2008
1992
1977
1961
1942
1931
1915
1897
1885
1869
1853
1840
1825
1810
1794
1780
1766
1748
1729
1702
1681
1658
1639
1606
1600
1575
1553
1529
1505
1489
1468
1451
1427
1412
1389
1375
1352
1336
1313
1299
1277
1264
1242
1231
HIGH
Rev. 0 | Page 37 of 60
PLL Band Select
010001 (17)
010000 (16)
001111 (15)
001110 (14)
001101 (13)
001100 (12)
001011 (11)
001010 (10)
001001 (9)
001000 (8)
000111 (7)
000110 (6)
000101 (5)
000100 (4)
000011 (3)
000010 (2)
000001 (1)
000000 (0)
Configuring PLL Band Select with Temperature Sensing
1.
2.
3.
4.
5.
If the optimal band is in the range of 0 to 31 (lower VCO
frequency), refer to Table 22.
Table 22. Setting Optimal PLL Band, When Band Is in the
Lower Range (0 to 31)
If System Startup
Temperature Is
−40°C to −10°C
−10°C to +15°C
15°C to 55°C
55°C to 85°C
The values of N1 (Register 0x09, Bits<6:5>) and N2
(Register 0x09, Bits<4:3>) should be programmed along
with the PLL settings shown in Table 20.
Set the PLL band (Register 0x08, Bits<7:2>) to 63 to enable
PLL auto mode.
Wait for the PLL_LOCK pin or the PLL lock indicator
(Register 0x00, Bit 1) to go high. This should occur within
5 ms.
Read back the 6-bit PLL band (Register 0x08, Bits<7:2>).
Based on the temperature when the PLL auto band select is
performed, set the PLL band indicated in either Table 22 or
Table 23 by rewriting the readback values into the PLL
Band Select parameter (Register 0x08, Bits<7:2>).
PLL Lock Ranges over Temperature, −40°C to +85°C
AD9776A/AD9778A/AD9779A
f
1149
1141
1115
1109
1086
1078
1055
1047
1026
1019
998
991
976
963
950
935
922
911
LOW
Set PLL Band as Follows
Set PLL band = readback band + 2
Set PLL band = readback band + 1
Set PLL band = readback band
Set PLL band = readback band − 1
VCO Frequency Range in MHz
f
1210
1198
1178
1166
1145
1135
1106
1103
1067
1072
1049
1041
1026
1011
996
981
966
951
HIGH