AD73322LARUZ Analog Devices Inc, AD73322LARUZ Datasheet - Page 36

• Manufacturer Part Number: AD73322LARUZ
• Description: IC,PCM CODEC,DUAL,CMOS,TSSOP,28PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of AD73322LARUZ

• Number Of Bits: 16
• Number Of Channels: 4
• Power (watts): 73mW
• Voltage - Supply, Analog: 2.7 V ~ 5.5 V
• Voltage - Supply, Digital: 2.7 V ~ 5.5 V
• Package / Case: 28-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD73322
The circular buffer approach can be useful if a long initialization
sequence is required. The list of initialization words is put into
the buffer in the required order.
.VAR/DM/RAM/CIRC init_cmds[16]; {Codec init sequence}
.VAR/DM/RAM
.INIT init_cmds:
and the DSP program initializes pointers to the top of the buffer
and puts the first entry in the DSP’s transmit buffer so that it is
available at the first SDOFS pulse.
The DSP’s transmit interrupt is enabled.
At each occurrence of an SDOFS pulse, the DSP’s transmit
buffer contents are sent to the SDI pin of the AD73322. This
also causes a subsequent DSP Tx interrupt which transfers the
initialization word, pointed to by the circular buffer pointer, to
the Tx buffer. The buffer pointer is updated to point to the next
unsent initialization word. When the circular buffer pointer
wraps around which happens after the last word has been ac-
cessed, it indicates that the initialization phase is complete. This
can be done “manually” in the DSP using a simple address
check or autobuffered mode can be used to the complete trans-
fer automatically.
b # 1 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 ,
b # 1 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 ,
b # 1 0 0 0 1 0 1 0 1 1 1 1 1 0 0 1 ,
b # 1 0 0 0 0 0 1 0 1 1 1 1 1 0 0 1 ,
b # 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 ,
b # 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 ,
b # 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 ;
i3 = ^init_cmds;
ax0 = dm(i3,m1);
tx0 = ax0;
imask = b#0001000000;
stat_flag;
l3 = %init_cmds;
–36–
txcdat: ar = dm(stat_flag);
In the main body of the program, the code loops waiting for the
initialization sequence to be completed.
check_init:
As the AD73322 is effectively a cascade of two codec units, it is
important to observe some restrictions in the sequence of send-
ing initialization words to the two codecs. It is preferable to send
pairs of control words for the corresponding control registers in
each codec and it is essential to send the control word for codec
2 before that for codec 1. Control Registers A and B contain
settings, such as sampling rate, serial clock rate etc., which
critically require synchronous update in both codecs.
Once the device has been initialized, Control Register A on both
codecs is written with a control word which changes the operat-
ing mode from Program Mode to either data mode or Mixed
Control Data Mode. The device count field which defaults to
000b will have to be programmed to 001b for a single AD73322
device. In data mode or mixed mode, the main function of the
device is to return ADC samples from both codecs and to accept
DAC words for both codecs. During each sample interval two
ADC samples will be returned from the device while in the same
interval two DAC update samples will be sent to the device. In
order to reduce the number of interrupts and to reduce com-
plexity, autobuffering can be used to ensure that only one inter-
rupt is generated during each sampling interval.
ar = pass ar;
if eq rti;
ena sec_reg;
ax0 = dm (i3, m1);
tx0 = ax0;
ax0 = i3;
ay0 = ^init_cmds;
ar = ax0 - ay0;
if gt rti;
ax0 = 0x00;
dm (stat_flag) = ax0;
rti;
ax0 = dm (stat_flag);
af = pass ax0;
if ne jump check_init;
REV. B