A6280EA-T Allegro Microsystems Inc, A6280EA-T Datasheet

A6280EA-T
Specifications of A6280EA-T
Related parts for A6280EA-T
A6280EA-T Summary of contents
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Features and Benefits ▪ 3 × 10-bit PWM brightness settings ▪ 3 × 7-bit dot correction current settings ▪ operation ▪ Wide output current range 150 mA per channel ▪ Serial port/PWM clock operates ...
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... Scrolling, colored marquees ▪ Architectural lighting ▪ High intensity monochrome displays ▪ Large video and graphic displays Selection Guide Part Number Packing* A6280EA-T 25 pieces/tube A6280EESTR-T 1500 pieces/reel *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Load Supply Voltage ...
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A6280 SDI CI LI OEI REXT R EXT VIN VREG OUT1 1 OUT0 2 SDO OEO REXT 7 VREG 8 Package A Terminal List Table Name A Package ES Package OUT1 1 OUT0 2 ...
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A6280 OPERATING CHARACTERISTICS, valid at T Characteristic ELECTRICAL CHARACTERISTICS Quiescent Supply Current Operating Supply Current Load Supply Voltage Undervoltage Lockout VREG Voltage Range 1 Output Current (any single output) Output to Output Matching Error 2 Output Voltage Range Load Regulation ...
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A6280 0 CI (Clock In SDI D30 D29 (Serial Data In) SDO (Serial Data Out) LI (Latch In) LO (Latch Out (Clock In PWM Counter 0 ...
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A6280 Shift Register The A6280 has a 31 bit shift register that loads data through the SDI (Serial Data In) pin. The shift register operates by a first-in first-out (FIFO) method. The most significant bit (MSB, bit 30) is the ...
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A6280 PWM Brightness Control The A6280 controls the intensity of each LED by pulse width modulating the current of each output. The A6280 has three 10-bit brightness registers, one for each output. These brightness registers set the PWM count value ...
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A6280 and external voltage regulators. For 5 V supplies, connect VIN to VREG externally. Note: When using 5 V supplies, ensure that VIN does not exceed the absolute maximum rating of the VREG pin (6 V). The V REG pin ...
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A6280 Undervoltage Lockout The A6280 includes an internal undervoltage lockout (UVLO) circuit that disables the driver outputs in the event of the logic supply voltage dropping below a minimum acceptable level. This prevents the display of erroneous information, a necessary ...
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A6280 Timing Considerations A6280s can be used in large numbers to drive many LEDs with the control signals connected serially together, with short cables between each pixel (see figure 8). Because the clock negative edge drives the data to the ...
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A6280 8 μF – System Logic Clock Data Latch Output Enable Tie LGND and PGND to PAD externally + μF – System Logic Clock Data Latch Output Enable Tie LGND and PGND to PAD ...
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A6280 A 0.005 D 17X 0.08 C 0.25 0.40 3-Channel Constant-Current LED Driver with A Package, 16 Pin DIP 0.750 16 0.250 1 2 All dimensions nominal, not for tooling use 0.210 (reference JEDEC MS-001 BB) Dimensions in inches 0.130 ...
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A6280 Copyright ©2006-2007, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the ...