A6280EA-T Allegro Microsystems Inc, A6280EA-T Datasheet - Page 8

• Manufacturer Part Number: A6280EA-T
• Description: IC,Laser Diode/LED Driver,DIP,16PIN,PLASTIC
• Manufacturer: Allegro Microsystems Inc
• Type: PWM Controlr

Specifications of A6280EA-T

• Constant Current: Yes
• Topology: Linear, PWM
• Number Of Outputs: 3
• Internal Driver: Yes
• Type - Secondary: RGB
• Frequency: 5MHz
• Voltage - Supply: 4.75 V ~ 17 V
• Voltage - Output: 1 V ~ 3 V
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 150mA
• Internal Switch(s): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Efficiency: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 620-1256

A6280
and external voltage regulators. For 5 V supplies, connect VIN
to VREG externally. Note: When using 5 V supplies, ensure that
VIN does not exceed the absolute maximum rating of the VREG
pin (6 V).
The V REG pin is used by the internal linear regulator to connect
to a bypass capacitor. This pin is for internal use only and is not
intended as an external power source. There should be a 1.0 μF,
10 V ceramic capacitor connected between the V REG pin and
LGND. The capacitor should be located as close to the V REG
pin as possible.
Dot Correction Control
The A6280 can further control the maximum output current for
each output by setting the three 7-bit dot correction registers
with scale data that ranges from 36.5% to 100% of the overall
maximum output current that is set by the R
feature is useful because not every type of LED (red, green, or
blue, for example) has the same level of brightness for a given
current, and the brightness could be different even from LED to
LED of the same type. By scaling the output currents so that all
the LEDs have matched intensities, the application will have full
color depth when using the PWM counters. The dot correction
current can be calculated by the following equation:
Where Scale
table:
I
OUTn
n
a
b
is in the range 0 to 127, as shown in the following
0 1 2 3 4 5 6
Selects which word is written to: Dot Correction/Clock Mode selection or PWM counter.
Allegro Test Bit (ATB). Reserved for Allegro internal testing. Always set to zero (0) in the application.
= I
Dot Correction
Scale
OUTn
127
. . .
Register 0
0
1
2
PWM Counter 0
(max) × (Scale
I
OUT
7
/I
Clock
Mode
36.5
37.0
37.5
OUT
100
(%)
. . .
n
/ 2 + 36.5) / 100
8
(max)
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
0
EXT
resistor. This
Dot Correction
Register 1
Figure 6. Register Configuration
PWM Counter 1
3-Channel Constant-Current LED Driver
Bits
0 0 0
with
Refer to figure 6 for the bit configurations for the scalar registers.
The dot correction data in the shift register is latched on a rising
edge of the LI (Latch In) pin. The dot correction data remains
latched on a rising OEI signal. The default output current when
the A6280 is powered-up or recovers from a UVLO is 36.5% of
the current set by the R
Package Power Dissipation
The maximum allowable package power dissipation is deter-
mined as:
The actual package power dissipation is:
where DC
output current for channel i, determined by the dot correction
current for that channel and REXT.
When calculating power dissipation, the total number of avail-
able device outputs is usually used for the worst-case situation
(i.e., displaying all 3 LEDs at 100% DC).
Thermal Shutdown (TSD)
When the junction temperature of the A6280 reaches the thermal
shutdown temperature threshold, T
outputs will shut off until the junction temperature cools down
below the recovery threshold, T
shift register and output latches will remain active during the
TSD event. Therefore there is no need to reset the data in the
output latches.
Programmable
Dot Correction
i
is the PWM duty cycle for channel i, and I
Register 2
PWM Counter 2
P
D
P
(max) = (150 – T
D(act)
EXT
+ DC
= DC
+ DC
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
resistor.
0 ATB
0
2
1
28
JTSD
× V
× V
× V
b
JTSD
DS2
DS0
DS1
ATB
A
–∆T
29
) / R
× I
× I
× I
b
PWM Control
(165°C typical), the
J
θJA
Address “0”
Address “1”
OUT2
OUT0
OUT1
( 15°C typical). The
30
.
a
+ V
IN
× I
OUTi
IN
.
is the
8