PUMD48 T/R NXP Semiconductors, PUMD48 T/R Datasheet - Page 3

Digital Transistors TRNS DOUBL RET TAPE7

PUMD48 T/R

Manufacturer Part Number
PUMD48 T/R
Description
Digital Transistors TRNS DOUBL RET TAPE7
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PUMD48 T/R

Configuration
Dual
Transistor Polarity
NPN/PNP
Typical Input Resistor
47 KOhms, 2.2 KOhms
Typical Resistor Ratio
1, 0.05
Mounting Style
SMD/SMT
Package / Case
SOT-363-6
Collector- Emitter Voltage Vceo Max
50 V
Peak Dc Collector Current
100 mA
Maximum Operating Temperature
+ 150 C
Minimum Operating Temperature
- 65 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PUMD48,115
NXP Semiconductors
5. Limiting values
PEMD48_PUMD48_5
Product data sheet
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
Symbol
Per transistor; for the PNP transistor with negative polarity
V
V
V
V
I
P
Per device
P
T
T
T
I
O
CM
j
amb
stg
CBO
CEO
EBO
I
tot
tot
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Reflow soldering is the only recommended soldering method.
Limiting values
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage TR1
input voltage TR2
output current
peak collector current
total power dissipation
total power dissipation
junction temperature
ambient temperature
storage temperature
positive
negative
positive
negative
PEMD48 (SOT666)
PUMD48 (SOT363)
PEMD48 (SOT666)
PUMD48 (SOT363)
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 13 April 2010
Conditions
open emitter
open base
open collector
T
T
amb
amb
≤ 25 °C
≤ 25 °C
NPN/PNP resistor-equipped transistors
PEMD48; PUMD48
[1][2]
[1][2]
[1]
[1]
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
−65
−65
© NXP B.V. 2010. All rights reserved.
Max
50
50
10
+40
−10
+5
−12
100
100
200
200
300
300
150
+150
+150
Unit
V
V
V
V
V
V
V
mA
mA
mW
mW
mW
mW
°C
°C
°C
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