LFXP2-17E-L-EV Lattice, LFXP2-17E-L-EV Datasheet - Page 5

• Manufacturer Part Number: LFXP2-17E-L-EV
• Description: MCU, MPU & DSP Development Tools LatticeXP2 EVAL BRD STD
• Manufacturer: Lattice

Specifications of LFXP2-17E-L-EV

• Processor To Be Evaluated: LatticeXP2-17 FPGA
• Interface Type: RS-232, USB
• Silicon Manufacturer: Lattice
• Core Architecture: FlexiFLASH
• Silicon Core Number: LFXP2-17E-4F484C
• Silicon Family Name: LatticeXP2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
old. Once the 1.2V supply rail is stable, the Power Manager turns on the 3.3V rail. Once again it waits for the 3.3V
supply rail to stabilize before performing any other action.
The Power Manager, having detected both the 1.2V and 3.3V supplies as stable, turns on the adjustable supply.
Since the adjustable supply is not critical to the operation of the board the Power Manager does not wait for it to
stabilize.
After the board is fully powered, the ispPAC-POWR607 monitors for power-down requests – pin IN1 for a high-
going transition. When IN1 is pulled above V
version devices, effectively powering the board down. The Power Manager continues to monitor the IN1 input, and
when it is pulled below V
U3, U4, and U6, once enabled by the ispPAC-POWR607, supply all power to the board. Adjacent to U3 and U6 are
current sense resistors. These are intended to permit the measurement of the current flowing from each of the
power supplies. The current sense resistors are 10mOhm in value.
Table 1. LatticeXP2 Current Sense Resistors
The LatticeXP2 Standard Evaluation Board also permits the voltage on VCCIO6 to be changed. Using a jumper on
J12 controls the voltage applied to VCCIO6. The voltages that can be supplied are shown in Table 2.
Table 2. LatticeXP2 IO Voltage Selection
Programmability
There are three programmable devices on the board. Of primary interest for the FPGA user is the LatticeXP2. How-
ever, the ispPAC-POWR607 Power Manager, and the MachXO™2280 are also important to the overall operation of
the board.
USB Download Cable
The evaluation board has a download cable built in. The components for the built-in download cable are located in
the southeast corner of the board. The built-in cable consists of a USB Type-B connector, a USB microcontroller,
and a MachXO device.
To use the built-in download cable, simply connect a standard USB cable (included) from J21 to your PC (with
ispVM System installed). The USB Hub on the PC will detect the addition of the USB Function making the built-in
cable available for use with Lattice’s ispVM System software.
The USB cable is connected in parallel to J34. J34 is a 1x10 100mil header that is provided for use with an external
Lattice download cable (available separately). A Lattice parallel port or USB download cable can be attached to the
board using J34.
Use of the built-in cable must be mutually exclusive to use of an external download cable. When using an external
download cable the jumper on J28 must be moved to shunt pins 1-2. This tri-states the MachXO device, preventing
it from interfering with the external download cable.
Block J12
Jumper
th
1-2
3-4
5-6
it restarts the board in the same order as described earlier.
User input from TP14/TP15
VAdj from U4 (1.1V-2.5V). Use R10 to adjust the output.
3.3V
Resistor
R12
R17
th
the Power Manager de-asserts the enable pins on all of the DC con-
Vcore
VCCAUX, VCCIO 1/2/3/4/5/7
VCCIO6 Voltage
Voltage Supply
5
Evaluation Board User’s Guide
LatticeXP2 Standard