LFXP2-17E-L-EV Lattice, LFXP2-17E-L-EV Datasheet - Page 14

• Manufacturer Part Number: LFXP2-17E-L-EV
• Description: MCU, MPU & DSP Development Tools LatticeXP2 EVAL BRD STD
• Manufacturer: Lattice

Specifications of LFXP2-17E-L-EV

• Processor To Be Evaluated: LatticeXP2-17 FPGA
• Interface Type: RS-232, USB
• Silicon Manufacturer: Lattice
• Core Architecture: FlexiFLASH
• Silicon Core Number: LFXP2-17E-4F484C
• Silicon Family Name: LatticeXP2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
The analog inputs of the device are connected to four test points. One of these test points is also connected to a
25K ohm discrete potentiometer. The potentiometer permits the input voltage level to vary between 0V to 3.3V at
one of the A/D inputs. The remaining three inputs are not connected to any passive or active components. These
test points can be used to inject signals meeting your own test requirements.
The digital I/O side of the device connects directly to the LatticeXP2 FPGA. Twelve of the I/O are the data-bus pins,
and seven are used to access the internal registers.
Table 15. A/D Connections
Digital to Analog Converter
The board also includes a Burr Brown DAC7617 12-bit Serial Input Digital to Analog converter.
The digital interface of the converter is a six-wire control set. Changes to the analog outputs are performed using
serial data. A change to an internal register requires 16 clock cycles.
The analog outputs from the D/A are connected directly to individual test points. There is no other logic connected
to the analog outputs.
The AIN2 input pin controls the range of the analog outputs. AIN2 is connected to a test-point adjacent to the A/D
converter described in the section above. AIN2 is also accessible via J20 pin 2. J20 is a 1x2 pin header that allows
the output of the digital potentiometer to be connected to the D/A VREFH input. In order for the digital potentiome-
ter to supply the reference voltage to the D/A converter, J20 must have pins 1-2 shunted. Regardless of the VREFH
source voltage, the D/A is able to output a voltage between VREFL (GND) and VREFH (AIN2) in a +/- 1/4096th
increment.
Table 16. D/A Connections
Digital Potentiometer
The evaluation board also provides a 10K ohm digital potentiometer. The potentiometer can be set to one of 128
positions between 0 ohm and 10K ohm. The potentiometer output voltage, which is present on J20 pin 1, can vary
from 0V to 3.3V. The potentiometer will be at the midpoint resistance at power up.
A/D Function
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
Serial Data In
Clock
Chip Select
Load All
Load Register
Reset
LatticeXP2 I/O
Digital to Analog
A17
B16
A16
B15
A15
C16
C17
D17
C18
D18
Function
14
LatticeXP2 I/O
A/D Function
C12
D12
C14
D14
A13
A14
BUSYn
AD10
AD11
WRn
CLK
CSn
RDn
A0
A1
Evaluation Board User’s Guide
LatticeXP2 Standard
LatticeXP2 I/O
C19
D19
C20
A21
B20
A20
A19
A18
B17