71M6521DEIM-DB Maxim Integrated Products, 71M6521DEIM-DB Datasheet - Page 123

• Manufacturer Part Number: 71M6521DEIM-DB
• Description: Power Management Modules & Development Tools 71M6521DE DEMO BOARD M6521DE DEMO BOARD
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521DEIM-DB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

71M652X Software User’s Guide
Mode 1
Pin rxd0 serves as an input, and txd0 serves as a serial output. No external shift clock is used. 10 bits are transmitted:
a start bit (always 0), 8 data bits (LSB first), and a stop bit (always 1). On receive, a start bit synchronizes the
transmission. 8 data bits are available by reading S0BUF, and the stop bit sets the flag RB80 in the Special Function
Register S0CON. In mode 1 either the internal baud rate generator or timer 1 can be use to specify the baud rate.
Mode 2
This mode is similar to Mode 1, with two differences. The baud rate is fixed at 1/32 or 1/64 of the oscillator frequency
and 11 bits are transmitted or received: a start bit (0), 8 data bits (LSB first), a programmable 9
The 9
9
Mode 3
The only difference between Mode 2 and Mode 3 is that in Mode 3, either the internal baud rate generator or timer 1
can be use to specify the baud rate.
Note: The common FLAG protocol requires the data format to be 7E1. This can be implemented using one of the 8-bit
modes, where the MSB (bit 0) is the parity bit. In this mode, the MPU calculates parity
Serial Interface 0 Control Register (S0CON).
The function of the serial port 0 depends on the setting of the Serial Port Control Register S0CON.
Revision 1.7
th
bit, and at receive, the 9
th
S0CON.7
S0CON.6
S0CON.5
S0CON.4
S0CON.3
S0CON.2
S0CON.1
S0CON.0
bit can be used to control the parity of the serial interface: at transmission, bit TB80 in S0CON is output as the
Bit
MSB
SM0
Symbol
SM20
REN0
RB80
TB80
SM0
SM1
RI0
TI0
th
SM1
bit affects RB80 in the Special Function Register S0CON.
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
Sets baud rate
Sets baud rate
reserved
The 9
Function
If set, enables serial reception. Cleared by software to disable reception.
depending on the function it performs (parity check, multiprocessor
communication etc.)
In Modes 2 and 3 it is the 9
RB80 is the stop bit. In Mode 0 this bit is not used. Must be cleared by
software
Transmit interrupt flag, set by hardware after completion of a serial
transfer. Must be cleared by software.
Receive interrupt flag, set by hardware after completion of a serial
reception. Must be cleared by software
SM20
Table 6-28: The S0CON Bit Functions
th
Table 6-27: The S0CON Register
transmitted data bit in Modes 2 and 3. Set or cleared by the MPU,
REN0
TERIDIAN Proprietary
TB80
th
data bit received. In Mode 1, if SM20 is 0,
RB80
TI0
RI0
LSB
th
bit, and a stop bit (1).
123 of 138