71M6521DEIM-DB Maxim Integrated Products, 71M6521DEIM-DB Datasheet - Page 122

• Manufacturer Part Number: 71M6521DEIM-DB
• Description: Power Management Modules & Development Tools 71M6521DE DEMO BOARD M6521DE DEMO BOARD
• Manufacturer: Maxim Integrated Products

Specifications of 71M6521DEIM-DB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 6-25 specifies the combinations of operation modes allowed for timer 0 and timer 1.
The serial buffer consists of two separate registers, a transmit buffer and a receive buffer.
Writing data to the Special Function Register S0BUF or S1BUF sets this data in the serial output buffer and starts
transmission. Reading from the S0BUF or S1BUF reads data from the serial receive buffer. The serial port can
simultaneously transmit and receive data. It can also buffer 1 byte at receive, preventing the receive data from being
lost if the MPU reads the first byte before transmission of the second byte is completed.
The Serial Interface 0 can operate in 4 modes:
Mode 0
Pin rxd0 serves as an input and an output. Txd0 outputs the shift clock. 8 bits are transmitted starting with the LSB.
The baud rate is fixed at 1/12 of the MPU frequency. Reception is initialized in Mode 0 by setting the flags in S0CON as
follows: RI0=0 and REN0=1. In other modes, when REN0 = 1, a start bit initiates receiving serial data.
Revision 1.7
6.3.2.1
6.3.3 Serial Interface 0 and 1
TCON.7
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
Bit
Allowed Combinations of Operation Modes
Serial Interface 0 Modes
Timer 0 - mode 0
Timer 0 - mode 1
Timer 0 - mode 2
Symbol
TR1
TR0
TF1
TF0
IE1
IT1
IE0
IT0
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
Function
The Timer 1 overflow flag is set by hardware when Timer 1 overflows. This flag
can be cleared by software and is automatically cleared when an interrupt is
processed.
Timer 1 Run control bit. If cleared, Timer 1 stops.
Timer 0 overflow flag set by hardware when Timer 0 overflows. This flag can be
cleared by software and is automatically cleared when an interrupt is processed.
Timer 0 Run control bit. If cleared, Timer 0 stops.
Interrupt 1 edge flag is set by hardware when the falling edge on external pin
int1 is observed. Cleared when an interrupt is processed.
Interrupt 1 type control bit. Selects either the falling edge or low level on input
pin to cause an interrupt.
Interrupt 0 edge flag is set by hardware when the falling edge on external pin
int0 is observed. Cleared when an interrupt is processed.
Interrupt 0 type control bit. Selects either the falling edge or low level on input
pin to cause interrupt.
Table 6-25: The TCON Register Bit Functions
Table 6-26: Timer Modes
TERIDIAN Proprietary
Not allowed
Mode 0
YES
YES
Not allowed
Timer 1
Mode 1
YES
YES
71M652X Software User’s Guide
Mode 2
YES
YES
YES
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