NJU6624CFG1-02 NJR, NJU6624CFG1-02 Datasheet - Page 22

• Manufacturer Part Number: NJU6624CFG1-02
• Description: LCD Drivers 14-Char/1-Line Dot Mtrx LCD Cntrlr Drvr
• Manufacturer: NJR

Specifications of NJU6624CFG1-02

• Number Of Digits: 14
• Number Of Segments: 70
• Maximum Clock Frequency: 218 KHz
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Package / Case: QFP-100-G1
• Maximum Supply Current: 500 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Example of 3 dot smooth scroll (NJU6624A+NJU6624B 23-character,1-line Display)
Example of 3 dot smooth scroll (NJU6624A+NJU6624B 23-character,1-line Display)
The smooth scroll sequence, which is executed by the 3dot-shift instruction, LCD display and DD RAM address
The smooth scroll sequence, which is executed by the 3dot-shift instruction, LCD display and DD RAM address
movement are shown as follows. (NJU6624A(Master) and NJU6624B(Slave) useing.)
movement are shown as follows. (NJU6624A(Master) and NJU6624B(Slave) useing.)
RAM address set
RAM address set
to the next page
to the next page
DD RAM(Master)
Display ON/OFF
DD RAM(Slave)
(Master, Slave)
(Master, Slave)
Write to RAM
Write to RAM
Write data to
Write data to
Display Shift
Power ON
Dot Shift
(Master)
(Master)
(Slave)
(Slave)
<DD RAM address>
<DD RAM address>
Set the address
Set the address
(0C)H to DDRAM(Master)
(0C)H to DDRAM(Master)
Write the data same as data in the slave address
Write the data same as data in the slave address
(01)H and (02)H into the DD RAM address (0C)H,
(01)H and (02)H into the DD RAM address (0C)H,
(0D)H for the master scroll RAM.
(0D)H for the master scroll RAM.
Set the address
Set the address
(0D)H to DDRAM(Slave)
(0D)H to DDRAM(Slave)
write character code
write character code
to the address (0D)H.
to the address (0D)H.
3dot-shift
3dot-shift
(Master and Slave)
(Master and Slave)
Seems to execute
Seems to execute
3dot-shift
3dot-shift
<LCD Display>
<LCD Display>
NJU6624A internal DDRAM
NJU6624A internal DDRAM
1ch
1ch
0 1
0 0
0 0
0 0
0 2
0 1
0 1
0 1
2
2
0 3
0 2
0 2
0 2
3
3
- - - -
- - - -
- - - -
- - - -
0 A
10 11 12 13 14 15
10 11 12 13 14 15
0 9
0 9
0 9
0 B
0 A
0 A
0 A
NJU6624 Binternal DDRAM
NJU6624 Binternal DDRAM
0 C
0 B
0 B
0 B
0 0
0 0
0 0
0 1
Note) DD RAM address for the scroll
Note) DD RAM address for the scroll
operations incremented (+1) automatically
operations incremented (+1) automatically
after the data write operation into RAM.
after the data write operation into RAM.
Therefore, the address set is not required
Therefore, the address set is not required
after the first address set.
after the first address set.
0 D
0 C
0 C
0 C
0 2
0 1
0 1
0 1
0 0
0 3
0 D
0 D
0 D
0 2
0 2
0 2
NJU6624A/B
NJU6624A/B
0 4
0 3
0 3
0 3
- - - -
- - - -
- - - -
- - - -
0 A
2 1 2 2 2 3
2 1 2 2 2 3
0 9
0 9
0 9
0 B
0 A
0 A
0 A
0C
0 B
0 B
0 B
0D
0 C
0 C
0 C
0 0
0 D
0 D
0 D