PN5120A0HN/C2,551 NXP Semiconductors, PN5120A0HN/C2,551 Datasheet - Page 100

• Manufacturer Part Number: PN5120A0HN/C2,551
• Description: IC TRANSMISSION MOD 40-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C2,551

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
20. Testsignals
PN512
Product data sheet
COMPANY PUBLIC
20.1 Selftest
20.2 Testbus
The PN512 has the capability to perform a digital selftest. To start the selftest the following
procedure has to be performed:
The testbus is implemented for production test purposes. The following configuration can
be used to improve the design of a system using the PN512. The testbus allows to route
internal signals to the digital interface. The testbus signals are selected by accessing
TestBusSel in register TestSel2Reg.
Table 158. Testsignal routing (TestSel2Reg = 07h)
Table 159. Description of Testsignals
Table 160. Testsignal routing (TestSel2Reg = 0Dh)
Pins
D6
D5
D4
D3
D2
D1
D0
Pins
Testsignal
Pins
Testsignal
1. Perform a soft reset.
2. Clear the internal buffer by writing 25 bytes of 00h and perform the Config Command.
3. Enable the Selftest by writing the value 09h to the register AutoTestReg.
4. Write 00h to the FIFO.
5. Start the Selftest with the CalcCRC Command.
6. The Selftest will be performed.
7. When the Selftest is finished, the FIFO contains the following bytes:
Correct answer for VersionReg equal to 82h:
0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95, 0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89,
0x5C, 0xDE, 0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B, 0x89, 0x82, 0x51, 0x3A, 0xEB,
0x02, 0x0C, 0xA5, 0x00, 0x49, 0x7C, 0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81,
0x5D, 0x48, 0x76, 0xD5, 0x71, 0x61, 0x21, 0xA9, 0x86, 0x96, 0x83, 0x38, 0xCF,
0x9D, 0x5B, 0x6D, 0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F
Testsignal
sdata
scoll
svalid
sover
RCV_reset
RFon, filtered
Envelope
clkstable
sdata
D6
D6
All information provided in this document is subject to legal disclaimers.
Rev. 3.6 — 10 March 2011
clk27/8
Description
shows the actual received data stream.
shows if in the actual bit a collision has been detected (106 kbit only)
shows if sdata and scoll are valid
shows that the receiver has detected a stop condition
(ISO/IEC 14443A/ MIFARE mode only).
shows if the receiver is reset
shows the value of the internal RF level detector
shows the output of the internal coder
scoll
D5
D5
111336
clk27rf/8
svalid
D4
D4
clkrf13rf/4
sover
D3
D3
RCV_reset
clk27
D2
D2
Transmission module
filtered
clk27rf
RFon,
© NXP B.V. 2011. All rights reserved.
D1
D1
PN512
Envelope
100 of 125
clk13rf
D0
D0