CDB5461AU Cirrus Logic Inc, CDB5461AU Datasheet - Page 16
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CDB5461AU
Manufacturer Part Number
CDB5461AU
Description
Eval Bd Sngl Phase Power/Energy
Manufacturer
Cirrus Logic Inc
Specifications of CDB5461AU
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS5461A
Primary Attributes
1-Phase, Energy-to-Frequency Output
Secondary Attributes
GUI, USB, SPI, Microwire Interfaces
Processor To Be Evaluated
CS5461A, C8051F320
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1552
INT pin will become active if the DRDY bit is unmasked
in the Mask Register. When these bits are set, they
must be cleared (logic 0) by the user before they can be
asserted again.
If the Cycle Count Register (N) is set to 1, all output cal-
culations are instantaneous, and DRDY, like CRDY, will
indicate when instantaneous measurements are fin-
ished. Some calculations are inhibited when the cycle
count is less than 2.
5.4 Energy Pulse Output
The CS5461A provides three output pins for energy reg-
istration. The E1 and E2 pins provide a simple interface
which energy can be registered. These pins are de-
signed to directly connect to a stepper motor or electro-
mechanical counter. E1 and E2 pins can be set to one
of four pulse output formats, Normal, Alternate, Stepper
Motor, or Mechanical Counter. Table 2 defines the
pulse output format, which is controlled by bits ALT in
the Configuration Register, and MECH and STEP in the
Control Register.
The E3 pin is designated for system calibration, the
pulse rate can be selected to reach a frequency of
512 kHz.
The pulse output frequency of E1 and E2 is directly pro-
portional to the active power calculated from the input
signals. To calculate the output frequency on E1 and
E2, the following transfer function can be utilized:
16
ALT
E 1
E 2
0
0
0
1
Table 2. E1 and E2 Pulse Output Format
. . .
. . .
STEP
X
X
0
1
MECH
0
1
0
1
P o s itiv e E n e rg y B u rs t
Figure 3. Normal Format on pulse outputs E1 and E2
t
d u r
Mechanical Counter
Alternate Pulse
Stepper Motor
FORMAT
Normal
With MCLK = 4.096 MHz, PF = 1, and default settings,
the pulses will have an average frequency equal to the
frequency setting in the PulseRateE
the input signals applied to the voltage and current
channels cause full-scale readings in the instantaneous
voltage and current registers. When MCLK/K is not
equal to 4.096 MHz, the user should scale the
PulseRateE
4.096 MHz/(MCLK/K) to get the actual pulse rate out-
put.
5.4.1 Normal Format
The Normal format is the default.
output format on pins E1 and E2. The E1 pin outputs ac-
tive-low pulses with a frequency proportional to the ac-
tive power. The E2 pin is the energy direction indicator.
Positive energy is represented by a pulse on the E1 pin
while the E2 pin remains high. Negative energy is rep-
resented by synchronous pulses on both the E1 pin and
the E2 pin.
The PulseRateE
quency on output pin E1, when full-scale input signals
are applied to the voltage and current channels. The
maximum
FREQ
FREQ
VIN = rms voltage across VIN+ and VIN- [V]
VGAIN = Voltage channel gain
IIN = rms voltage across IIN+ and IIN- [V]
IGAIN = Current channel gain
PF = Power Factor
PulseRateE 1,2 = Maximum frequency on E1 and E2 [Hz]
VREFIN = Voltage at VREFIN pin [V]
E
E
=
= Average frequency of E1 and E2 pulses [Hz]
VIN
----------------------------------------------------------------------------------------------------------------------------------------------- -
1,2
pulse
×
Register
VGAIN
1,2
Register defines the average fre-
frequency
×
IIN
N e g a tiv e E n e rg y B u rs t
×
VREFIN
IGAIN
by
Figure 3
from
×
2
PF
a
1,2
×
CS5461A
PulseRateE 1 2
Register when
the
illustrates the
factor
DS661F2
E1
. . .
. . .
,
pin
of