CDB5461AU Cirrus Logic Inc, CDB5461AU Datasheet

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CDB5461AU

Manufacturer Part Number
CDB5461AU
Description
Eval Bd Sngl Phase Power/Energy
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5461AU

Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS5461A
Primary Attributes
1-Phase, Energy-to-Frequency Output
Secondary Attributes
GUI, USB, SPI, Microwire Interfaces
Processor To Be Evaluated
CS5461A, C8051F320
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1552
Features
• Energy Data Linearity: ±0.1% of Reading over
• On-chip Functions:
• Meets Accuracy Spec for IEC, ANSI, & JIS.
• Low Power Consumption
• Current Input Optimized for Sense Resistor.
• GND-referenced Signals with Single Supply
• On-chip 2.5 V Reference (25 ppm/°C typ)
• Power Supply Monitor
• Simple Three-wire Digital Serial Interface
• “Auto-boot” Mode from Serial E
• Power Supply Configurations:
http://www.cirrus.com
1000:1 Dynamic Range
VA+ = +5 V; AGND = 0 V; VD+ = +3.3 V to +5 V
- Instantaneous Voltage, Current, and Power
- I
- Energy-to-pulse Conversion for Mechanical
- System Calibrations and Phase Compensation
- Temperature Sensor
- Voltage Sag Detect
Counter/Stepper Motor Drive
RMS
Single Phase, Bi-directional Power/Energy IC
and V
RMS
VREFOUT
VREFIN
, Apparent and Active (Real) Power
VIN+
VIN-
IIN+
IIN-
PGA
x10
x1
Reference
AGND
Voltage
VA+
2nd Order ∆Σ
4th Order ∆Σ
Modulator
Modulator
2
PROM.
Monitor
PFMON
Power
Copyright © Cirrus Logic, Inc. 2008
Temperature
System
(All Rights Reserved)
Clock
Sensor
RESET
Digital
Digital
Filter
Filter
/K
XIN
Description
The CS5461A is an integrated power measure-
ment
analog-to-digital converters, power calculation
engine, energy-to-frequency converter, and a
serial interface on a single chip. It is designed to
accurately measure instantaneous current and
voltage, and calculate V
neous power, apparent power, and active power
for single-phase, 2- or 3-wire power metering
applications.
The CS5461A is optimized to interface to shunt
resistors or current transformers for current mea-
surement, and to resistive dividers or potential
transformers for voltage measurement.
The CS5461A features a bi-directional serial in-
terface for communication with a processor, and
a programmable energy-to-pulse output func-
tion.
functionality to facilitate system-level calibration,
temperature sensor, voltage sag detection, and
phase compensation.
ORDERING INFORMATION:
Option
Option
Generator
HPF
HPF
XOUT CPUCLK
Clock
See
Page 43.
Additional
device
Calculation
Calibration
Engine
Power
DGND
VD+
which
features
Interface
E-to-F
Serial
combines
RMS
CS5461A
MODE
SDI
SCLK
CS
SDO
INT
E1
E2
E3
, I
include
RMS
, instanta-
two
DS661F2
on-chip
APR ‘08
∆Σ

Related parts for CDB5461AU

CDB5461AU Summary of contents

Page 1

Single Phase, Bi-directional Power/Energy IC Features • Energy Data Linearity: ±0.1% of Reading over 1000:1 Dynamic Range • On-chip Functions: - Instantaneous Voltage, Current, and Power - I and V , Apparent and Active (Real) Power RMS RMS - Energy-to-pulse ...

Page 2

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Current and Voltage Gain Register ( I 6.4 Cycle Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

Figure 1. CS5461A Read and Write Timing Diagrams ........................................................................... 11 Figure 2. Data Flow. ................................................................................................................................ 13 Figure 3. Normal Format on pulse outputs E1 and E2............................................................................ 16 Figure 4. Alternate Pulse Format on E1 and E2 ..................................................................................... 17 Figure 5. ...

Page 5

OVERVIEW The CS5461A is a CMOS monolithic power measurement device with a computation engine and an en- ergy-to-frequency pulse output. The CS5461A combines a programmable-gain amplifier, two ∆Σ ana- log-to-digital converters (ADCs), system calibration and a computation engine on ...

Page 6

PIN DESCRIPTION Crystal Out CPU Clock Output Positive Digital Supply Digital Ground Serial Clock Serial Data Ouput Chip Select Mode Select Differential Voltage Input Differential Voltage Input Voltage Reference Output Voltage Reference Input Clock Generator Crystal Out 1,24 Crystal ...

Page 7

CHARACTERISTICS & SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter Positive Digital Power Supply Positive Analog Power Supply Voltage Reference Specified Temperature Range ANALOG CHARACTERISTICS • Min / Max characteristics and specifications are guaranteed over all • Typical characteristics and specifications are ...

Page 8

ANALOG CHARACTERISTICS Parameter Temperature Channel Temperature Accuracy Power Supplies Power Supply Currents (Active State) I (VA VD Power Consumption Active State (VA (Note 3) Active State (VA+ = ...

Page 9

DIGITAL CHARACTERISTICS • Min / Max characteristics and specifications are guaranteed over all • Typical characteristics and specifications are measured at nominal supply voltages and °C. • VA ±5%; AGND = DGND = ...

Page 10

SWITCHING CHARACTERISTICS • Min / Max characteristics and specifications are guaranteed over all • Typical characteristics and specifications are measured at nominal supply voltages and °C. • VA ±5% VD+ = 3.3 V ±5% ...

Page 11

...

Page 12

ABSOLUTE MAXIMUM RATINGS WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes Parameter DC Power Supplies Input Current, Any Pin Except Supplies Output Current, Any Pin ...

Page 13

Order DELAY ∆Σ VOLTAGE x10 REG Modulator 6 PC6 PC5 PC4 PC3 PC2 PC1 PC0 Configuration Register * 4th Order SINC 3 ∆Σ PGA CURRENT Modulator * DENOTES REGISTER NAME. 4. THEORY OF OPERATION The CS5461A is a dual-channel ...

Page 14

To generate a value for the accumulated active energy over the last computation cycle, the active power can be multiplied by the time duration of the computation cycle. The apparent power is the combination of the active power and reactive ...

Page 15

FUNCTIONAL DESCRIPTION 5.1 Analog Inputs The CS5461A is equipped with two fully differential in- put channels. The inputs VIN± and IIN± are designated as the voltage and current channel inputs, respectively. The full-scale differential input voltage for the current ...

Page 16

INT pin will become active if the DRDY bit is unmasked in the Mask Register. When these bits are set, they must be cleared (logic 0) by the user before they can be asserted again. If the Cycle Count Register ...

Page 17

PW ... ... E1 ... E2 Figure 4. Alternate Pulse Format on E1 and E2 is (MCLK/K)/16. The pulse duration (t multiple of MCLK cycles, approximately equal to: 1 ≅ ------------------------------------------- - t sec dur PulseRateE 1 ...

Page 18

Figure 6. Stepper Motor Format on E1 and E2 energy level, the energy ...

Page 19

EXAMPLE #2: The required number of pulses per unit energy present specified to be 500 pulses per kWhr, given that the line voltage is 250 Vrms and the line current is 20 Arms. In such a situation, ...

Page 20

The Cycle Count Register (N) must be set to a value greater than one. Status bit TUP in the Status Register, indicates when the Temperature Register is updated. The Temperature Offset Register sets the zero-degree measurement. To improve temperature measurement ...

Page 21

The CS5461A can be driven by an external oscillator ranging from 2 MHz, but the K divider value must be set such that the internal MCLK will ...

Page 22

Serial Port Overview The CS5461A incorporates a serial port transmit and re- ceive buffer with a command decoder that interprets one-byte (8 bits) commands as they are received. There are four types of commands; instructions, synchroniz- ing, register writes ...

Page 23

Commands All commands are 8-bits in length. Any byte that is not listed in this section is invalid. Commands that write to regis- ters must be followed by 3 bytes of data. Commands that read data can be chained ...

Page 24

Register Read/Write W/R RA4 RA3 RA2 The Read/Write informs the command decoder that a register access is required. During a read operation, the ad- dressed register is loaded into an output buffer and ...

Page 25

Calibration CAL4 CAL3 CAL2 CAL1 CAL0 The CS5461A can perform system calibrations. Proper input signals must be applied to the current and voltage channel before performing a designated calibration. CAL[4:0]* Designates ...

Page 26

REGISTER DESCRIPTION 1. “Default” => bit status after power-on or reset 2. Any bit not labeled is Reserved. A zero should always be used when writing to one of these bits. 6.1 Configuration Register Address PC6 ...

Page 27

Inverts the CPUCLK clock. In order to reduce the level of noise present when analog signals are sampled, the logic driven by CPUCLK should not be active during the sample edge Normal operation (default Minimize ...

Page 28

PulseRateE Register 1,2 Address: 6 MSB Default = 0xFA000 = 32000.00 Hz PulseRateE sets the frequency of the E1 and/or E2 pulses. The smallest valid frequency is 2 1,2 ...

Page 29

Status Register and Mask Register ( Status , Mask ) Address: 15 (Status); 26 (Mask DRDY 15 14 IROR VROR 7 6 TUP TOD Default = 0x000001 (Status Register), 0x000000 (Mask Register) The Status Register indicates status ...

Page 30

Current and Voltage AC Offset Register ( V Address: 16 (Current AC Offset); 17 (Voltage AC Offset) MSB -( Default = 0x000000 The AC Offset Registers (V ACoff AC ...

Page 31

Pulsewidth Register ( PW ) Address: 21 MSB Default = 0x000200 = 512 sample periods PW sets the pulsewidth of E1 and E2 pulses in Alternate Pulse and Mechanical ...

Page 32

No Load Threshold Interval Register ( LoadIntv) Address: 25 MSB Default = 0x000000 = No load threshold feature disabled LoadMin determines the duration or interval of the no load ...

Page 33

Control Register Register Address MECH Default = 0x000000 FAC Determines if anti-creep is enabled for pulse output E3 Disable anti-creep (default Enabled anti-creep EAC Determines if anti-creep is ...

Page 34

Temperature Offset Register ( T Address: 30 MSB -( Default = 0xF3D35A = -0.0951126 Temperature offset ( used to remove the temperature channel’s offset at the zero ...

Page 35

SYSTEM CALIBRATION 7.1 Channel Offset and Gain Calibration The CS5461A provides digital DC offset and gain com- pensation that can be applied to the instantaneous volt- age and current measurements, and AC offset compensation to the voltage and current ...

Page 36

AC Offset Calibration Sequence Corresponding offset registers I should be cleared prior to initiating AC offset calibra- tions. Initiate an AC offset calibration. The AC offset reg- isters are updated with ...

Page 37

However signal should not be used for DC gain calibration. 7.1.3.2 DC Gain Calibration Sequence Initiate a DC gain calibration. The corresponding gain register is restored to default (1.0). The DC gain calibra- tion algorithm averages the ...

Page 38

AUTO-BOOT MODE USING E When the CS5461A MODE pin is asserted (logic 1), the CS5461A auto-boot mode is enabled. In auto-boot mode, the CS5461A downloads the required com- mands and register data from an external serial 2 E PROM, ...

Page 39

BASIC APPLICATION CIRCUITS Figure 15 shows the CS5461A configured to measure power in a single-phase, 2-wire system while operating in a single-supply configuration. In this diagram, a shunt resistor is used to sense the line current and a voltage ...

Page 40

VAC N L Potential Transformer Figure 16. Typical Connection Diagram (Single-phase, 2-wire – Isolated from Power Line) 240 VAC 120 VAC 120 VAC Earth Ground Figure 17. Typical Connection Diagram ...

Page 41

VAC Figure 18. Typical Connection Diagram (Single-phase, 3-wire – No Neutral Available) DS661F2 L 2 500 Ω 1 kΩ 470 µF 0.1 µF 235 Vdiff ...

Page 42

DIMENSIONS 24L SSOP PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.002 A2 0.064 b 0.009 D 0.311 E 0.291 E1 0.197 e 0.022 L 0.025 ∝ 0° Notes: 3. “D” and ...

Page 43

ORDERING INFORMATION Model CS5461A-IS CS5461A-ISZ (lead free) 12. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5461A-IS CS5461A-ISZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS661F2 Temperature -40 to +85 °C Peak Reflow Temp MSL ...

Page 44

REVISION HISTORY Revision Date A1 DEC 2004 Advance Release PP1 FEB 2005 Initial Preliminary Release F1 AUG 2005 Final version Updated with most-recent characterization data. MSL data added. F2 APR 2008 Added LoadIntv, LoadMin, & PulseWidth registers. Added APF ...

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