CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 14
![Eval Bd Ultra Low Power Stereo Codec](/photos/9/8/90867/cdb42l55_sml.jpg)
CDB42L55
Manufacturer Part Number
CDB42L55
Description
Eval Bd Ultra Low Power Stereo Codec
Manufacturer
Cirrus Logic Inc
Specifications of CDB42L55
Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L55
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1506
CDB-42L55
CDB-42L55
CDB42L55
4.4
DSP Engine Tab
The “DSP Engine” tab provides high-level control functions to modify the SDIN (PCM) data volume level,
the ADC output/SDIN mix volume level, Tone Control and Beep Generator. Status text detailing the CO-
DEC’s specific configuration is shown inside the control group of the affected control. This text will change
depending on the setting of the associated control. A description of each control group is outlined below (a
description of each register is included in the CS42L55 data sheet):
Digital Volume Control - Configures the volume/gain of the ADC mix or the PCM data from the serial data
input (SDIN) in the DSP.
Tone Control - Sets the corner frequencies and the volume/gain of the treble and bass shelving filters in the
DSP engine.
Beep Generator - Controls for setting the various beep parameters.
Update - Reads all registers in the CS42L55 and reflects the current values in the GUI.
Reset - Resets the CS42L55.
Figure 7. DSP Engine Tab
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