EVAL-ADUC842QSZ Analog Devices Inc, EVAL-ADUC842QSZ Datasheet - Page 65

• Manufacturer Part Number: EVAL-ADUC842QSZ
• Description: Analog MCU Evaluation Board
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC842QSZ

• Silicon Manufacturer: Analog Devices
• Core Architecture: 8052
• Silicon Core Number: ADuC842
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC824
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

UART SERIAL INTERFACE
The serial port is full-duplex, meaning it can transmit and
receive simultaneously. It is also receive-buffered, meaning it
can begin receiving a second byte before a previously received
byte has been read from the receive register. However, if the first
byte still has not been read by the time reception of the second
byte is complete, the first byte is lost. The physical interface to
the serial data network is via Pins RxD(P3.0) and TxD(P3.1),
while the SFR interface to the UART is comprised of SBUF and
SCON, as described below.
Table 32. SCON SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
Name
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
Description
UART Serial Mode Select Bits.
These bits select the serial port operating mode as follows:
SM0
0
0
1
1
Multiprocessor Communication Enable Bit.
Enables multiprocessor communication in Modes 2 and 3.
In Mode 0, SM2 must be cleared.
In Mode 1, if SM2 is set, RI is not activated if a valid stop bit was not received. If SM2 is cleared, RI is set as soon as the
byte of data has been received.
In Modes 2 or 3, if SM2 is set, RI is not activated if the received 9th data bit in RB8 is 0.
If SM2 is cleared, RI is set as soon as the byte of data has been received.
Serial Port Receive Enable Bit.
Set by user software to enable serial port reception.
Cleared by user software to disable serial port reception.
Serial Port Transmit (Bit 9).
The data loaded into TB8 is the 9th data bit transmitted in Modes 2 and 3.
Serial Port Receiver Bit 9.
The 9th data bit received in Modes 2 and 3 is latched into RB8. For Mode 1, the stop bit is latched into RB8.
Serial Port Transmit Interrupt Flag.
Set by hardware at the end of the 8th bit in Mode 0, or at the beginning of the stop bit in Modes 1, 2, and 3.
TI must be cleared by user software.
Serial Port Receive Interrupt Flag.
Set by hardware at the end of the 8th bit in Mode 0, or halfway through the stop bit in Modes 1, 2, and 3.
RI must be cleared by software.
SM1
0
1
0
1
Selected Operating Mode.
Mode 0: Shift Register, fixed baud rate (Core_Clk/2).
Mode 1: 8-bit UART, variable baud rate.
Mode 2: 9-bit UART, fixed baud rate (Core_Clk/32) or (Core_Clk/16).
Mode 3: 9-bit UART, variable baud rate.
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SBUF
Both the serial port receive and transmit registers are accessed
through the SBUF SFR (SFR address = 99H). Writing to SBUF
loads the transmit register, and reading SBUF accesses a
physically separate receive register.
SCON UART
SFR Address
Power-On Default
Bit Addressable
ADuC841/ADuC842/ADuC843
Serial Port Control Register
98H
00H
Yes