EVAL-ADXL346Z Analog Devices Inc, EVAL-ADXL346Z Datasheet - Page 24

• Manufacturer Part Number: EVAL-ADXL346Z
• Description: Inertial Sensor Evaluation System
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADXL346Z

• Silicon Manufacturer: Analog Devices
• Silicon Core Number: ADXL346
• Kit Application Type: Sensing - Motion / Vibration / Shock
• Application Sub Type: Accelerometer
• Silicon Family Name: IMEMS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADXL346
ACT_x Enable Bits and INACT_x Enable Bits
A setting of 1 enables x-, y-, or z-axis participation in detecting
activity or inactivity. A setting of 0 excludes the selected axis from
participation. If all axes are excluded, the function is disabled.
For activity detection, all participating axes are logically OR’ e d,
causing the activity function to trigger when any of the partici-
pating axes exceeds the threshold. For inactivity detection, all
participating axes are logically AND’ e d, causing the inactivity
function to trigger only if all participating axes are below the
threshold for the specified period of time.
Register 0x28—THRESH_FF (Read/Write)
The THRESH_FF register is eight bits and holds the threshold
value, in unsigned format, for free-fall detection. The acceleration
on all axes is compared with the value in THRESH_FF to deter-
mine if a free-fall event occurred. The scale factor is 62.5 mg/LSB.
Note that a value of 0 mg may result in undesirable behavior if
the free-fall interrupt is enabled. Values between 300 mg and
600 mg (0x05 to 0x09) are recommended.
Register 0x29—TIME_FF (Read/Write)
The TIME_FF register is eight bits and stores an unsigned time
value representing the minimum time that the value of all axes
must be less than THRESH_FF to generate a free-fall interrupt.
The scale factor is 5 ms/LSB. A value of 0 may result in undesirable
behavior if the free-fall interrupt is enabled. Values between 100 ms
and 350 ms (0x14 to 0x46) are recommended.
Register 0x2A—TAP_AXES (Read/Write)
D7
0
Improved Tap Bit
The improved tap bit is used to enable improved tap detection.
This mode of operation improves tap detection by performing
an ac-coupled differential comparison of the output acceleration
data. The improved tap detection is performed on the same output
data available in the DATAX, DATAY, and DATAZ registers. Due
to the dependency on the output data rate and the ac-coupled
differential measurement, the threshold and timing values for
single taps and double taps must be adjusted for improved tap
detection. For further explanation of improved tap detection, see
the Improved Tap Detection section. Improved tap is enabled
by setting the improved tap bit to a value of 1 and is disabled
by clearing the bit to a value of 0.
Suppress Bit
Setting the suppress bit suppresses double-tap detection if
acceleration greater than the value in THRESH_TAP is present
between taps. See the Tap Detection section for more details.
TAP_x Enable Bits
A setting of 1 in the TAP_X enable, TAP_Y enable, or TAP_Z
enable bit enables x-, y-, or z-axis participation in tap detection.
A setting of 0 excludes the selected axis from participation in
tap detection.
D6
0
D5
0
D4
Improved
tap
D3
Suppress
D2
TAP_X
enable
D1
TAP_Y
enable
D0
TAP_Z
enable
Rev. A | Page 24 of 40
Register 0x2B—ACT_TAP_STATUS (Read Only)
D7
0
ACT_x Source and TAP_x Source Bits
These bits indicate the first axis involved in a tap or activity
event. A setting of 1 corresponds to involvement in the event,
and a setting of 0 corresponds to no involvement. When new
data is available, these bits are not cleared but are overwritten by
the new data. The ACT_TAP_STATUS register should be read
before clearing the interrupt. Disabling an axis from participation
clears the corresponding source bit when the next activity or
single-tap/double-tap event occurs.
Asleep Bit
A setting of 1 in the asleep bit indicates that the part is asleep,
and a setting of 0 indicates that the part is not asleep. This bit
toggles only if the device is configured for autosleep. See the
Register 0x2D—POWER_CTL (Read/Write) section for more
information on autosleep mode.
Register 0x2C—BW_RATE (Read/Write)
D7
0
LOW_POWER Bit
A setting of 0 in the LOW_POWER bit selects normal operation,
and a setting of 1 selects reduced power operation, which is
associated with somewhat higher noise (see the Power Modes
section for details).
Rate Bits
These bits select the device bandwidth and output data rate (see
Table 7 and Table 8 for details). The default value is 0x0A, which
translates to a 100 Hz output data rate. An output data rate should
be selected that is appropriate for the communication protocol and
frequency selected. Selecting too high of an output data rate with a
low communication speed results in samples being discarded.
Register 0x2D—POWER_CTL (Read/Write)
D7
0
Link Bit
A setting of 1 in the link bit with both the activity and inactivity
functions enabled delays the start of the activity function until
inactivity is detected. After activity is detected, inactivity detection
begins, preventing the detection of activity. This bit serially links
the activity and inactivity functions. When this bit is set to 0,
the inactivity and activity functions are concurrent. Additional
information can be found in the Link Mode section.
D6
ACT_X
source
D6
0
D6
0
D5
Link
D5
0
D5
ACT_Y
source
D4
AUTO_SLEEP
D4
LOW_POWER
D4
ACT_Z
source
D3
Asleep
D3
Measure
D3
D2
TAP_X
source
D2
D2
Sleep
D1
TAP_Y
source
Rate
D1
D1
Wakeup
D0
TAP_Z
source
D0
D0