AD9548/PCBZ Analog Devices Inc, AD9548/PCBZ Datasheet - Page 89

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AD9548/PCBZ

Manufacturer Part Number
AD9548/PCBZ
Description
Clock Generator Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9548/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9548
Kit Contents
Board
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9548
Primary Attributes
62.5 ~ 450 MHz Output Frequency
Secondary Attributes
SPI and I2C Compatible Control Port
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Address
069C
069D
1
Table 104. R-Divider—Profile 2
Address
069E
069F
06A0
06A1
1
Table 105. S-Divider—Profile 2
Address
06A2
06A3
06A4
06A5
1
Table 106. Fractional Feedback Divider—Profile 2
Address
06A6
06A7
06A8
Table 107. Lock Detectors—Profile 2
Address
06A9
06AA
06AB
06AC
06AD
06AE
06AF
06B0
06B1
The digital loop filter coefficients (α, β, γ, and δ) have the general form: x(2
The value of the linear component (x) constitutes a fraction, where 0 ≤ x < 1. The exponential component (y) is an integer. See the Calculating Digital Filter Coefficients
section for details.
The value stored in the R-divider register yields an actual divide ratio of one more than the programmed value.
The value stored in the S-divider register yields an actual divide ratio of one more than the programmed value. Furthermore, the value of S must be at least 7.
[7:0]
[7:0]
[7:0]
[7:6]
[5:0]
[7:0]
[7:0]
[7:0]
[7:6]
[5:0]
[7:0]
[7:4]
[3:2]
[1:0]
[7:6]
[5:0]
Bits
Bits
Bits
Bits
[7]
[6:0]
[7:4]
[3:0]
Bits
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
Bit Name
R
Unused
R
Bit Name
S
Unused
S
Bit Name
V
U
Unused
V
Unused
U
Bit Name
Delta-1 exponent
Delta-0 linear
Alpha-3 exponent
Delta-1 exponent
Bit Name
Phase lock threshold
(units determined by
Register 0x0680[7])
Phase lock fill rate
Phase lock drain rate
Frequency lock
thresh-old (in
picoseconds)
Frequency lock fill rate
Frequency lock drain
rate
1
1
Description
R, Bits[7:0]
R, Bits[15:8]
R, Bits[23:16]
R, Bits[29:24]
Description
S, Bits[7:0]
S, Bits[15:8]
S, Bits[23:16]
S, Bits[29:24]
Description
V, Bits[7:0]
U, Bits[3:0]
V, Bits[9:8]
U, Bits[9:4]
Description
Delta-1 coefficient exponent, Bit 0
Delta-0 coefficient linear, Bits[14:8]
Alpha-3 coefficient exponent, Bits[3:0]
Delta-1 coefficient exponent, Bits[4:1]
Description
Phase lock threshold, Bits[7:0]
Phase lock threshold, Bits[15:8]
Phase lock fill rate, Bits[7:0]
Phase lock drain rate, Bits[7:0]
Frequency lock threshold, Bits[7:0]
Frequency lock threshold, Bits[15:8]
Frequency lock threshold, Bits[23:16]
Frequency lock fill rate, Bits[7:0]
Frequency lock drain rate, Bits[7:0]
Rev. A | Page 89 of 112
y
), where x is the linear component and y is the exponential component of the coefficient.
AD9548

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