AD9276-65EBZ Analog Devices Inc, AD9276-65EBZ Datasheet - Page 7

• Manufacturer Part Number: AD9276-65EBZ
• Description: 65MSPS ADC Converter Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9276-65EBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: ADC
• Kit Application Type: Data Converter
• Silicon Core Number: AD9276
• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Inputs Per Adc: 1 Differential
• Input Range: *
• Power (typ) @ Conditions: 195mW @ 40MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9276
• Development Tool Type: Hardware - Eval/Demo Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DIGITAL SPECIFICATIONS
AVDD1 = 1.8 V, AVDD2 = 3.0 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, f
Table 2.
Parameter
CLOCK INPUTS (CLK+, CLK−)
CW 4LO INPUTS (4LO+, 4LO−)
LOGIC INPUTS (PDWN, STBY, SCLK, RESET)
LOGIC INPUT (CSB)
LOGIC INPUT (SDIO)
LOGIC OUTPUT (SDIO)
DIGITAL OUTPUTS (DOUTx+, DOUTx−), (ANSI-644)
DIGITAL OUTPUTS (DOUTx+, DOUTx−),
LOGIC OUTPUTS (GPO0, GPO1, GPO2, GPO3)
1
2
3
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were
completed.
Specified for LVDS and LVPECL only.
Specified for 13 SDIO pins sharing the same connection.
Logic Compliance
Differential Input Voltage
Input Common-Mode Voltage
Input Resistance (Differential)
Input Capacitance
Logic Compliance
Differential Input Voltage
Input Common-Mode Voltage
Input Resistance (Differential)
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
Input Capacitance
Logic 1 Voltage (I
Logic 0 Voltage (I
Logic Compliance
Differential Output Voltage (V
Output Offset Voltage (V
Output Coding (Default)
(LOW POWER, REDUCED SIGNAL OPTION)
Logic Compliance
Differential Output Voltage (V
Output Offset Voltage (V
Output Coding (Default)
Logic 0 Voltage (I
1
OH
OL
OL
= 50 μA)
= 50 μA)
= 800 μA)
3
OS
OS
2
2
)
)
OD
OD
)
)
1
1
Full
Full
Full
Full
Temperature
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
25°C
25°C
Full
Full
Full
Rev. 0 | Page 7 of 48
Min
250
250
1.2
1.2
1.2
0
247
1.125
150
1.10
IN
= 5 MHz, full temperature, unless otherwise noted.
CMOS/LVDS/LVPECL
CMOS/LVDS/LVPECL
Typ
1.2
20
1.5
1.2
20
1.5
30
0.5
70
0.5
30
2
1.79
LVDS
LVDS
Offset binary
Offset binary
Max
3.6
0.3
3.6
0.3
DRVDD + 0.3
0.3
0.05
454
1.375
250
1.30
0.05
AD9276
Unit
mV p-p
V
kΩ
pF
mV p-p
V
kΩ
pF
V
V
kΩ
pF
V
V
kΩ
pF
V
V
kΩ
pF
V
V
mV
V
mV
V
V