AD9276-65EBZ Analog Devices Inc, AD9276-65EBZ Datasheet - Page 31

• Manufacturer Part Number: AD9276-65EBZ
• Description: 65MSPS ADC Converter Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9276-65EBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: ADC
• Kit Application Type: Data Converter
• Silicon Core Number: AD9276
• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Inputs Per Adc: 1 Differential
• Input Range: *
• Power (typ) @ Conditions: 195mW @ 40MSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9276
• Development Tool Type: Hardware - Eval/Demo Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Variable Gain Amplifier (VGA)
The differential X-AMP VGA provides precise input attenu-
ation and interpolation. It has a low input-referred noise of
3.8 nV/√Hz and excellent gain linearity. A simplified block
diagram is shown in Figure 59.
GAIN±
VIP
VIN
Figure 57. LNA with 17.9 dB Gain Setting/VGA Full-Scale Limitations
Figure 58. LNA with 21.3 dB Gain Setting/VGA Full-Scale Limitations
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.6
0.5
0.4
0.3
0.2
0.1
g
0
m
0
0
0
PGA GAIN = 27dB
3.5dB
0.2
PGA GAIN = 30dB
0.2
GAIN INTERPOLATOR
Figure 59. Simplified VGA Schematic
PGA GAIN = 27dB
0.4
PGA GAIN = 30dB
0.4
0.6
0.6
GAIN+ (V)
GAIN+ (V)
0.8
PGA GAIN = 24dB
PGA GAIN = 21dB
0.8
PGA GAIN = 21dB
PGA GAIN = 24dB
1.0
1.0
1.2
1.2
1.4
+
–
1.4
POSTAMP
POSTAMP
1.6
1.6
Rev. 0 | Page 31 of 48
The input of the VGA is a 14-stage differential resistor ladder with
3.5 dB per tap. The resulting total gain range is 42 dB, which
allows for range loss at the endpoints. The effective input resistance
per side is 180 Ω nominally for a total differential resistance of
360 Ω. The ladder is driven by a fully differential input signal from
the LNA. LNA outputs are dc-coupled to avoid external decoupling
capacitors. The common-mode voltage of the attenuator and the
VGA is controlled by an amplifier that uses the same midsupply
voltage derived in the LNA, permitting dc coupling of the LNA
to the VGA without introducing large offsets due to common-
mode differences. However, any offset from the LNA becomes
amplified as the gain increases, producing an exponentially
increasing VGA output offset.
The input stages of the X-AMP are distributed along the ladder,
and a biasing interpolator, controlled by the gain interface, deter-
mines the input tap point. With overlapping bias currents, signals
from successive taps merge to provide a smooth attenuation range
from −42 dB to 0 dB. This circuit technique results in linear-in-dB
gain law conformance and low distortion levels—only deviating
±0.5 dB or less from the ideal. The gain slope is monotonic with
respect to the control voltage and is stable with variations in
process, temperature, and supply.
The X-AMP inputs are part of a programmable gain feedback
amplifier that completes the VGA. Its bandwidth is approximately
100 MHz. The input stage is designed to reduce feedthrough to
the output and to ensure excellent frequency response uniformity
across the gain setting.
Gain Control
The gain control interface, GAIN±, is a differential input. V
varies the gain of all VGAs through the interpolator by selecting
the appropriate input stages connected to the input attenuator.
For GAIN− at 0.8 V, the nominal GAIN+ range for 28.5 dB/V is
0 V to 1.6 V, with the best gain linearity from about 0.16 V to
1.44 V, where the error is typically less than ±0.5 dB. For GAIN+
voltages greater than 1.44 V and less than 0.16 V, the error
increases. The value of GAIN+ can exceed the supply voltage
by 1 V without gain foldover.
Gain control response time is less than 750 ns to settle within 10%
of the final value for a change from minimum to maximum gain.
The GAIN+ and GAIN− pins can be interfaced in one of two
ways. Using a single-ended method, a Kelvin type of connec-
tion to ground can be used, as shown in Figure 60. For driving
multiple devices, it is preferable to use a differential method, as
shown in Figure 61. In either method, the GAIN+ and GAIN−
pins should be dc-coupled and driven to accommodate a 1.6 V
full-scale input.
Figure 60. Single-Ended GAIN+, GAIN− Pin Configuration
GAIN+
GAIN–
0.01µF
0.01µF
CONNECTION
KELVIN
100Ω
50Ω
0V TO 1.6V DC
AD9276
GAIN