ADNS-9500 Avago Technologies US Inc., ADNS-9500 Datasheet - Page 19

• Manufacturer Part Number: ADNS-9500
• Description: Ultimate Gaming Laser Sensor
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-9500

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NCS
MOSI
SCLK
MISO
Frame Capture
This is a fast way to download a full array of pixel values
from a single frame. This mode disables navigation and
overwrites any downloaded firmware. A hardware reset
is required to restore navigation, and the SROM firmware
must be reloaded.
To trigger the capture, write to the Frame_Capture register.
The next available complete 1 frame image will be stored
to memory. The data are retrieved by reading the Pixel_
Burst register once using the normal read method, after
which the remaining bytes are clocked out by driving
SCLK at the normal rate. If the Pixel_Burst register is read
before the data is ready, it will return all zeros.
Figure 22. Frame Capture Burst Mode
19
t
>120ns
NCS-SCLK
2 reg write to enter
frame capture mode
address
data
2 frames
Wait for
pixel dump reg read
address
t
SRAD
Procedure of Frame Capture:
1. Reset the chip by writing 0x5a to Power_Up_Reset
2. Enable laser by setting Forced_Disable bit (bit-0) of
3. Write 0x93 to Frame_Capture register.
4. Write 0xc5 to Frame_Capture register.
5. Wait for two frames.
6. Check for first pixel by reading bit zero of Motion
7. Continue read from Pixel_Burst register until all 900
8. Continue step 3-7 to capture another frame.
Note: Manual reset and SROM download are needed after frame capture
to restore navigation for motion reading.
register (address 0x3a).
LASER_CTRL0 register to 0.
register. If =1, first pixel is available.
pixels are transferred.
enter burst
mode
P1
≥15 Ps
t
LOAD
P2
soonest to begin again
P900
exit burst mode
t
BEXIT
≥4 Ps
frame capture reg
address
≥100 Ps