ADNS-9500 Avago Technologies US Inc., ADNS-9500 Datasheet - Page 12

• Manufacturer Part Number: ADNS-9500
• Description: Ultimate Gaming Laser Sensor
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-9500

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. (Typical values at 25 °C, VDD3 = 2.8V, VDDIO = 1.8V)
12
Parameter
Motion delay after reset
Shutdown
Wake from shutdown
Forced Rest enable
Wake from Forced Rest
MISO rise time
MISO fall time
MISO delay after SCLK
MISO hold time
MOSI hold time
MOSI setup time
SPI time between
write commands
SPI time between write and
read commands
SPI time between read and
subsequent commands
SPI read address-data delay
NCS inactive after motion
burst
NCS to SCLK active
SCLK to NCS inactive
(for read operation)
SCLK to NCS inactive
(for write operation)
NCS to MISO high-Z
MOTION rise time
MOTION fall time
Transient Supply Current
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
I
I
DDT5
DDT3
MOT-RST
STDWN
WAKEUP
REST-EN
REST-DIS
r-MISO
f-MISO
DLY-MISO
hold-MISO
hold-MOSI
setup-MOSI
SWW
SWR
SRW
SRR
SRAD
BEXIT
NCS-SCLK
SCLK-NCS
SCLK-NCS
NCS-MISO
r-MOTION
f-MOTION
Minimum
30
30
200
200
120
120
120
20
100
500
120
120
20
Typical
50
50
50
50
Maximum
500
1
1
200
200
120
500
200
200
90
65
Units
ms
ms
ms
s
s
ns
ns
ns
ns
ns
ns
Ps
Ps
Ps
Ps
ns
ns
ns
us
ns
ns
ns
mA
mA
Notes
From SW_RESET register write to
valid motion, assuming motion is
present
From Shutdown mode active to low
current
From Shutdown mode inactive to
valid motion. Notes: A RESET must
be asserted after a shutdown. Refer
to Shutdown
section, also note t
From RESTEN bits set to low current
From RESTEN bits cleared to valid
motion
C
C
From SCLK falling edge to MISO data
valid, no load conditions
Data held until next falling SCLK
edge
Amount of time data is valid after
SCLK rising edge
From data valid to SCLK rising edge
From rising SCLK for last bit of the
first data byte, to rising SCLK for last
bit of the second data byte.
From rising SCLK for last bit of the
first data byte, to rising SCLK for last
bit of the second address byte.
From rising SCLK for last bit of the
first data byte, to falling SCLK for the
first bit of the address byte of the
next command.
From rising SCLK for last bit of the
address byte, to falling SCLK for first
bit of data being read.
Minimum NCS inactive time after
motion burst before next SPI usage
From last NCS falling edge to first
SCLK rising edge
From last SCLK rising edge to NCS ris-
ing edge, for valid MISO data transfer
From last SCLK rising edge to NCS ris-
ing edge, for valid MOSI data transfer
From NCS rising edge to MISO high-Z
state
C
C
Max supply current during a V
ramps from 0 to 5.0V
Max supply current during a V
ramps from 0 to 2.8V
L
L
L
L
= 100pF
= 100pF
= 100pF
= 100pF
MOT-RST
DD5
DD3