ACPL-W70L-560E Avago Technologies US Inc., ACPL-W70L-560E Datasheet - Page 10

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ACPL-W70L-560E

Manufacturer Part Number
ACPL-W70L-560E
Description
Stretch Singles Pb-free TR VDE
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ACPL-W70L-560E

Voltage - Isolation
5000Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
10mA
Data Rate
15MBd
Propagation Delay High - Low @ If
23ns @ 6mA
Current - Dc Forward (if)
10mA
Input Type
DC
Output Type
Push-Pull, Totem-Pole
Mounting Type
Surface Mount
Package / Case
6-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ACPL-W70L-560E
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Figure 8. Recommended printed circuit board layout
Figure 9. Propagation delay skew waveform
time, t
tion delay, either t
delay, either t
termine the maximum parallel data transmission rate.
Figure 10 is the timing diagram of a typical parallel data
application with both the clock and the data lines being
sent through optocouplers. The figure shows data and
clock signals at the inputs and outputs of the optocou-
plers. To obtain the maximum data transmission rate, both
edges of the clock signal are being used to clock the data;
if only one edge were used, the clock signal would need
to be twice as fast.
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an op-
tocoupler.
10
V
V
GND1
V
V
O
O
I
I
I
F
PSK
1
2
3
is the difference between the shortest propaga-
PHL
ACPL-W70L
50%
50%
or t
PHL
2.5 V,
CMOS
PHL
or t
. As mentioned earlier, t
PHL
6
5
4
, and the longest propagation
t
PSK
GND2
C
V
C=0.01μF to 0.1μF
Vo
DD
2.5 V,
CMOS
PSK
can de-
GND 1
GND 1
I
I
F1
F2
1
2
3
4
INPUTS
OUTPUTS
Figure 10. Parallel data transmission example.
Figure 10 shows that there will be uncertainty in both the
data and the clock lines. It is important that these two ar-
eas of uncertainty not overlap, otherwise the clock signal
might arrive before all of the data outputs have settled, or
some of the data outputs may start to change before the
clock signal has arrived.
From these considerations, the absolute minimum pulse
width that can be sent through optocouplers in a parallel
application is twice t
slightly longer pulse width to ensure that any additional
uncertainty in the rest of the circuit does not cause a
problem.
The t
guaranteed specifications for propagation delays, pulse-
width distortion and propagation delay skew over the rec-
ommended temperature, and power supply ranges.
ACPL-K73L
CLOCK
CLOCK
DATA
DATA
PSK
specified optocouplers offer the advantages of
8
7
6
5
t
PSK
GND 2
PSK
C
. A cautious design should use a
t
PSK
V
V
V
DD
O1
O2

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