CV500II101 Omron, CV500II101 Datasheet - Page 153

• Manufacturer Part Number: CV500II101
• Description: Programmable Logic Controller
• Manufacturer: Omron

Specifications of CV500II101

• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Alphabetic List of Instructions by Function Code
Data Shift Instructions
BCD Calculation and Carry Instructions
148
Note Instructions with one asterisk (*) are supported by the CVM1D and version-2 CVM1 CPU Units only.
050
051
052
053
054
055
056
057
058
059
060
061
062
063
064
065
066
067
068
069
070
071
072
073
074
075
076
077
078
079
Code
Code
Instructions with two asterisks (**) are supported by the CV500, CV1000, and CV2000 only.
Instructions with three asterisks (***) are not supported by the CVM1D.
SFT
SFTR(j)
ASFT(j)
WSFT(j)
NSFL*
NSFR*
NASL*
NASR*
NSLL*
NSRL*
ASL(j)
ASR(j)
ROL(j)
ROR(j)
ASLL(j)
ASRL(j)
ROLL(j)
RORL(j)
SLD(j)
SRD(j)
ADD(j)
SUB(j)
MUL(j)
DIV(j)
ADDL(j)
SUBL(j)
MULL(j)
DIVL(j)
STC(j)
CLC(j)
Mnemonic
Mnemonic
SHIFT REGISTER
REVERSIBLE SHIFT
REGISTER
ASYNCHRONOUS SHIFT
REGISTER
WORD SHIFT
SHIFT N-BIT DATA LEFT
SHIFT N-BIT DATA RIGHT
SHIFT N-BITS LEFT
SHIFT N-BITS RIGHT
DOUBLE SHIFT N-BIT LEFT
DOUBLE SHIFT N-BIT
RIGHT
ARITHMETIC SHIFT LEFT
ARITHMETIC SHIFT RIGHT
ROTATE LEFT
ROTATE RIGHT
DOUBLE SHIFT LEFT
DOUBLE SHIFT RIGHT
DOUBLE ROTATE LEFT
DOUBLE ROTATE RIGHT
SHIFT DIGIT LEFT
SHIFT DIGIT RIGHT
BCD ADD
BCD SUBTRACT
BCD MULTIPLY
BCD DIVIDE
DOUBLE BCD ADD
DOUBLE BCD SUBTRACT
DOUBLE BCD MULTIPLY
DOUBLE BCD DIVIDE
SET CARRY
CLEAR CARRY
Name
Name
Binary Calculation Instructions
Increment/Decrement Instructions
Data Format Conversion and Special
Calculation Instructions
Basic I/O Unit Instructions
080
081
082
083
084
085
086
087
090
091
092
093
094
095
096
097
100
101
102
103
104
105
106
110
111
112
113
114
115
116
117
Code
Code
Code
Code
ADB(j)
SBB(j)
MLB(j)
DVB(j)
ADBL(j)
SBBL(j)
MLBL(j)
DVBL(j)
INC(j)
DEC(j)
INCB(j)
DECB(j)
INCL(j)
DECL(j)
INBL(j)
DCBL(j)
BIN(j)
BCD(j)
BINL(j)
BCDL(j)
NEG(j)
NEGL(j)
SIGN(j)
MLPX(j)
DMPX(j)
SDEC(j)
ASC(j)
BCNT(j)
LINE(j)
COLM(j)
HEX(j)*
Mnemonic
Mnemonic
Mnemonic
Mnemonic
BINARY ADD
BINARY SUBTRACT
BINARY MULTIPLY
BINARY DIVIDE
DOUBLE BINARY ADD
DOUBLE BINARY
SUBTRACT
DOUBLE BINARY
MULTIPLY
DOUBLE BINARY DIVIDE
INCREMENT BCD
DECREMENT BCD
INCREMENT BINARY
DECREMENT BINARY
DOUBLE INCREMENT BCD
DOUBLE DECREMENT
BCD
DOUBLE INCREMENT
BINARY
DOUBLE DECREMENT
BINARY
BCD-TO-BINARY
BINARY-TO-BCD
DOUBLE BCD-TO-DOUBLE
BINARY
DOUBLE
BINARY-TO-DOUBLE BCD
2’S COMPLEMENT
DOUBLE 2’S
COMPLEMENT
SIGN
4-TO-16 DECODER
16-TO-4 ENCODER
7-SEGMENT DECODER
ASCII CONVERT
BIT COUNTER
COLUMN-TO-LINE
LINE-TO-COLUMN
ASCII-TO-HEX
Name
Name
Name
Name
Appendix E