APDS-9300-020 Avago Technologies US Inc., APDS-9300-020 Datasheet - Page 10

• Manufacturer Part Number: APDS-9300-020
• Description: IC SENSOR AMBIENT LIGHT 6CHIPLED
• Manufacturer: Avago Technologies US Inc.
• Type: Chipr

Specifications of APDS-9300-020

• Wavelength: 640nm, 940nm
• Output Type: I²C™
• Package / Case: 6CHIPLED
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 30 C
• Output Current: 20mA
• Sensor Output: Digital
• Supply Voltage Range Dc: 2.4V To 3V
• External Depth: 2.2mm
• External Width: 2.6mm
• Leaded Process Compatible: Yes
• Length/height, External: 0.55mm
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-2134-2

Command Register
The command register specifies the address of the target register for subsequent read and write operations. The Send
Byte protocol is used to configure the COMMAND register. The command register contains eight bits as described in
Table 3. The command register defaults to 00h at power on.
Table 3. Command Register
Control Register (0h)
The CONTROL register contains two bits and is primarily used to power the APDS-9300 device up and down as shown
in Table 4.
Table 4. Control Register
NOTE: If a value of 03h is written, the value returned during a read cycle will be 03h. This feature can be used to verify that the device is communicating
properly.
10
Reset Value:
Reset Value:
Field
CMD
CLEAR
WORD
Resv
ADDRESS
Field
Resv
POWER
0h
Resv
CMD
7
7
0
0
BIT
7:2
1:0
BIT
7
6
5
4
3:0
Resv
CLEAR
0
0
6
6
Description
Reserved. Write as 0.
Power up/power down. By writing a 03h to this register, the device is powered up.
By writing a 00h to this register, the device is powered down.
Description
Select command register. Must write as 1.
Interrupt clear. Clears any pending interrupt.
This bit is a write–one–to–clear bit. It is self clearing.
I
1 indicates that this I
Reserved. Write as 0.
Register Address.
This field selects the specific control or status register for following write and read com-
mands according to Table 2.
2
C Write/Read Word Protocol.
WORD
Resv
0
0
5
5
Resv
Resv
4
4
0
0
2
C transaction is using either the I
Resv
0
0
3
3
Resv
2
2
0
0
ADDRESS
2
C Write Word or Read Word protocol.
1
0
1
0
POWER
0
0
0
0
COMMAND
CONTROL