APDS-9801 Avago Technologies US Inc., APDS-9801 Datasheet - Page 7

• Manufacturer Part Number: APDS-9801
• Description: INTEGRATED DIGITAL PS AND ALS
• Manufacturer: Avago Technologies US Inc.
• Type: Analog Ambient Light Sensor and Digital Proximity Sensorr

Specifications of APDS-9801

• Peak Wavelength: 940 nm
• Maximum Light Current: 83 uA
• Maximum Dark Current: 300 nA
• Maximum Rise Time: 1000 ns
• Maximum Fall Time: 300 ns
• Mounting Style: SMD/SMT
• Product: Integrated Ambient Light and Proximity Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Write Byte Protocol
Read Byte Protocol
Slave Address
APDS-9801 PS slave address is 1010101 [0X55]
PS-I2C Interfacing
Register Address for PS:
Command Register
The command register specifies the address of the target register for subsequence read and write operations. The write
byte protocol is used to configure the COMMAND register.
Reset Value: 0x00h
7
ADDRESS
–
0h
1h
2h
3h
4h
5h
6h
7h
FIELD
CMD
Threshold Interrupt clear
EOC Interrupt clear
Software Rest
ADDRESS
CMD
1
S
1
S
7
Slave Address
Threshold Interrupt clear
7
Slave Address
Register Name
Command
Shutdown
Pulse_Freq
Interval delay & control
Thres_low
Thres_high
Data_low
Data_high
interrupt
7
6
Wr
1
BIT
7
6
5
4
3:0
A
1
Description
Select command register. Must be ‘1’
Clear the pending thresholds interrupt. Write ‘1’ to clear. Self clearing.
Clear the pending end of conversion of the ADC interrupt. Write ‘1’ to clear. Self clearing.
Write 1 to this bit to reset the chip to default register value self clearing.
This is for software reset only.
Register address. This field selects the specific register.
Common Code
Wr
1
EOC Interrupt clear
8
A
1
5
Register Function
Specifies register address
Power on/off
Set the period, duty cycle and number of pulses for burst pulses
Set the delay time between burst pulses & control
Low byte of interrupt threshold
High byte of interrupt threshold
Low byte of ADC output
High byte of ADC output
Interrupt status and enable
Common Code
A
1
8
Sr
1
Software Reset
Slave Address
4
7
1
A
Rd
3
1
A
1
Data Byte
8
Data Byte
Address
8
2
A
A
1
1
1
1
P
1
P
0