APDS-9801 Avago Technologies US Inc., APDS-9801 Datasheet - Page 10

• Manufacturer Part Number: APDS-9801
• Description: INTEGRATED DIGITAL PS AND ALS
• Manufacturer: Avago Technologies US Inc.
• Type: Analog Ambient Light Sensor and Digital Proximity Sensorr

Specifications of APDS-9801

• Peak Wavelength: 940 nm
• Maximum Light Current: 83 uA
• Maximum Dark Current: 300 nA
• Maximum Rise Time: 1000 ns
• Maximum Fall Time: 300 ns
• Mounting Style: SMD/SMT
• Product: Integrated Ambient Light and Proximity Sensor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADC Data Output Register (Low byte) (5h)
Reset value: 0x00h
ADC Data Output Register (High byte) (6h)
Reset value: 0x00h
Interrupt Register (7h)
Reset value: 0x00h
10
FIELD
ADC output data
Low byte
FIELD
ADC output data high
byte
FIELD
Negative Threshold
interrupt status
Positive Threshold
interrupt status
EOC Interrupt status
Threshold Interrupt
Enable
EOC Interrupt Enable
resv
7
7
7
interrupt status
Threshold
Negative
6
BIT
7:0
BIT
3:0
BIT
6
5
4
1
0
reserved
6
6
interrupt status
Description
Lower byte of 12bits ADC output data. The ADC data are expressed as 12 bits values spread
across 2 registers (register address 5h & 6h). Read only.
Description
Upper 4 bits of 12 bits ADC output data. The ADC data are expressed as 12 bits values spread
across 2 registers (register address 5h & 6h). Read only.
Description
Read only. Interrupt happens when ADC output data value fall below the interrupt threshold
set by threshold registers. Write a ‘1’ to bit 6 of the command register to clear the interrupt.
(note 2)
Read only. Interrupt happens when ADC output data value rise above the interrupt threshold
set by threshold registers. Write a ‘1’ to bit 6 of the command register to clear the interrupt.
(note 2)
Read only. Interrupt happens when it is the end of conversion for the ADC. Write a ‘1’ to bit 5
of the command register to clear the interrupt.
‘1’: threshold interrupt (when ADC rise above or fall below threshold set) enable to external
interrupt pin.
‘0’: threshold interrupt (when ADC rise above or fall below threshold set) disable to external
interrupt pin.
‘1’: EOC interrupt enable to external interrupt pin.
‘0’: EOC interrupt disable to external interrupt pin.
Threshold
Positive
5
5
5
ADC output data low byte
EOC interrupt
4
4
status
4
3
3
3
resv
ADC output data high byte
2
2
2
Interrupt enable
Threshold
1
1
1
EOC Interrupt
enable
0
0
0