PIC18LF24J10-I/SO Microchip Technology, PIC18LF24J10-I/SO Datasheet - Page 355
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PIC18LF24J10-I/SO
Manufacturer Part Number
PIC18LF24J10-I/SO
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
6.PIC18LF24J10-ISS.pdf
(32 pages)
Specifications of PIC18LF24J10-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180012 - MODULE PLUG-IN 18LF25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164332 - MODULE SKT FOR 28SOIC 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Details
INDEX
A
A/D ................................................................................... 215
Absolute Maximum Ratings ............................................. 303
AC (Timing) Characteristics ............................................. 317
Access Bank
ACKSTAT ........................................................................ 182
ACKSTAT Status Flag ..................................................... 182
ADCAL Bit ........................................................................ 223
ADCON0 Register ............................................................ 215
ADCON1 Register ............................................................ 215
ADCON2 Register ............................................................ 215
ADDFSR .......................................................................... 292
ADDLW ............................................................................ 255
ADDULNK ........................................................................ 292
ADDWF ............................................................................ 255
ADDWFC ......................................................................... 256
ADRESH Register ............................................................ 215
ADRESL Register .................................................... 215, 218
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 256
ANDWF ............................................................................ 257
Assembler
Auto-Wake-up on Sync Break Character ......................... 206
B
Bank Select Register (BSR) ............................................... 58
Baud Rate Generator ....................................................... 178
BC .................................................................................... 257
BCF .................................................................................. 258
BF .................................................................................... 182
BF Status Flag ................................................................. 182
© 2009 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ....................... 219
Acquisition Requirements ........................................ 220
ADCAL Bit ................................................................ 223
ADCON0 Register .................................................... 215
ADCON1 Register .................................................... 215
ADCON2 Register .................................................... 215
ADRESH Register ............................................ 215, 218
ADRESL Register .................................................... 215
Analog Port Pins, Configuring .................................. 221
Associated Registers ............................................... 223
Automatic Acquisition Time ...................................... 221
Calculating the Minimum Required
Calibration ................................................................ 223
Configuring the Module ............................................ 219
Conversion Clock (T
Conversion Status (GO/DONE Bit) .......................... 218
Conversions ............................................................. 222
Converter Characteristics ........................................ 334
Operation in Power-Managed Modes ...................... 223
Special Event Trigger (ECCP) ......................... 136, 222
Use of the ECCP2 Trigger ....................................... 222
Load Conditions for Device
Parameter Symbology ............................................. 317
Temperature and Voltage Specifications ................. 318
Timing Conditions .................................................... 318
Mapping with Indexed Literal Offset Mode ................. 70
GO/DONE Bit ........................................................... 218
MPASM Assembler .................................................. 300
Acquisition Time .............................................. 220
Timing Specifications ...................................... 318
AD
) ........................................... 221
PIC18F45J10 FAMILY
Block Diagrams
BN .................................................................................... 258
BNC ................................................................................. 259
BNN ................................................................................. 259
BNOV .............................................................................. 260
BNZ ................................................................................. 260
BOR. See Brown-out Reset.
BOV ................................................................................. 263
BRA ................................................................................. 261
Break Character (12-Bit) Transmit and Receive .............. 208
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 43
BSF .................................................................................. 261
BTFSC ............................................................................. 262
BTFSS ............................................................................. 262
BTG ................................................................................. 263
BZ .................................................................................... 264
C
C Compilers
A/D ........................................................................... 218
Analog Input Model .................................................. 219
Baud Rate Generator .............................................. 178
Capture Mode Operation ......................................... 129
Comparator Analog Input Model .............................. 229
Comparator I/O Operating Modes ........................... 226
Comparator Output .................................................. 228
Comparator Voltage Reference ............................... 232
Comparator Voltage Reference Output
Compare Mode Operation ....................................... 130
Device Clock .............................................................. 30
Enhanced PWM ....................................................... 137
EUSART Receive .................................................... 205
EUSART Transmit ................................................... 203
External Power-on Reset Circuit
Fail-Safe Clock Monitor ........................................... 245
Generic I/O Port Operation ........................................ 97
Interrupt Logic ............................................................ 84
MSSP (I
MSSP (I
MSSP (SPI Mode) ................................................... 149
On-Chip Reset Circuit ................................................ 41
PIC18F24J10/25J10 .................................................. 10
PIC18F44J10/45J10 .................................................. 11
PLL ............................................................................ 29
PORTD and PORTE (Parallel Slave Port) ............... 113
PWM Operation (Simplified) .................................... 132
Reads from Flash Program Memory ......................... 75
Single Comparator ................................................... 227
Table Read Operation ............................................... 71
Table Write Operation ............................................... 72
Table Writes to Flash Program Memory .................... 77
Timer0 in 16-Bit Mode ............................................. 116
Timer0 in 8-Bit Mode ............................................... 116
Timer1 ..................................................................... 120
Timer1 (16-Bit Read/Write Mode) ............................ 121
Timer2 ..................................................................... 126
Watchdog Timer ...................................................... 242
and On-Chip Voltage Regulator .............................. 243
Disabling in Sleep Mode ............................................ 43
MPLAB C18 ............................................................. 300
MPLAB C30 ............................................................. 300
Buffer Example ................................................ 233
(Slow V
2
2
C Master Mode) ........................................ 176
C Mode) .................................................... 159
DD
Power-up) ........................................ 43
DS39682E-page 353