PIC16HV785-E/P Microchip Technology, PIC16HV785-E/P Datasheet - Page 83

3.5KB Flash, 128 RAM, 18 I/O 20 PDIP .300in TUBE

PIC16HV785-E/P

Manufacturer Part Number
PIC16HV785-E/P
Description
3.5KB Flash, 128 RAM, 18 I/O 20 PDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16HV785-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
PIC16H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOICACICE0203 - MPLABICE 20P 300 MIL ADAPTER
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16HV785-E/P
Manufacturer:
MICROCHIP
Quantity:
12 000
12.1.5
The A/D conversion is initiated by setting the
GO/DONE bit (ADCON0<1>). When the conversion is
complete, the A/D module:
• Clears the GO/DONE bit
• Sets the ADIF flag (PIR1<6>)
• Generates an interrupt (if enabled)
FIGURE 12-2:
12.1.6
The A/D conversion can be supplied in two formats: left
or right justified. The ADFM bit of the ADCON0 register
controls the output format. Figure 12-3 shows the out-
put formats.
FIGURE 12-3:
© 2008 Microchip Technology Inc.
(ADFM = 0)
(ADFM = 1)
STARTING A CONVERSION
CONVERSION OUTPUT
T
CY
Set GO bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
to T
AD
Conversion Starts
MSB
A/D CONVERSION T
10-BIT A/D RESULT FORMAT
bit 7
bit 7
T
AD
Unimplemented: Read as ‘0’
1
T
AD
b9
ADRESH (ADDRESS:1Eh)
2
T
AD
b8
3
T
10-bit A/D Result
AD
b7
AD
4
CYCLES
T
AD
b6
5
MSB
T
AD
b5
6
bit 0
bit 0
If the conversion must be aborted, the GO/DONE bit
can be cleared in software. The ADRESH:ADRESL
registers will not be updated with the partially complete
A/D
ADRESH:ADRESL registers will retain the value of the
previous conversion. After an aborted conversion, a
2 T
be initiated. Following the delay, an input acquisition is
automatically started on the selected channel.
ADRESH and ADRESL registers are loaded,
GO bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
T
AD
b4
Note:
AD
7
delay is required before another acquisition can
T
PIC16F785/HV785
AD
b3
bit 7
bit 7
conversion
8
The GO/DONE bit should not be set in the
same instruction that turns on the A/D.
10-bit A/D Result
LSB
T
AD
b2
9
ADRESL (ADDRESS:9Eh)
T
AD
b1
Unimplemented: Read as ‘0’
10 T
sample.
AD
b0
11
DS41249E-page 81
Instead,
bit 0
LSB
bit 0
the

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