LM93CIMT National Semiconductor, LM93CIMT Datasheet - Page 72

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LM93CIMT

Manufacturer Part Number
LM93CIMT
Description
Microprocessor Support IC
Manufacturer
National Semiconductor
Datasheets

Specifications of LM93CIMT

Peak Reflow Compatible (260 C)
No
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Supply Voltage Min
3V
Operating Temperature Min
0��C
Package / Case
56-TSSOP
Operating Temperature Max
85°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Register
Address
Register
Address
16.0 Registers
16.8.15 Register CAh PWM1 Control 3
Bits 7:5 configure the spin-up duration. When the duty cycle of PWM1 changes from zero to a non-zero value, the spin-up
sequence is activated for the specified amount of time. The available settings are defined according to this table:
16.8.16 Register CBh Special Function PWM1 Control 4
CBh
CAh
Read/
Write
R/W
Read/
Write
R/W
3:0
7:5
2:0
7:3
Bit
Bit
4
Special Function
PWM1 Control 4
Control 3
Register
PWM1
(Continued)
Name
Register
Name
SU_DUR
SU_DC
FREQ1
Name
Name
RES
RES
FREQ1 or FREQ2
Bit 7
SU_DUR
Bit 7
0h
1h
2h
3h
4h
5h
6h
7h
RES
0h
1h
2h
3h
4h
5h
6h
7h
R/W
R/W
R/W
R/W
R/W
SU_DUR
R
R
Bit 6
Bit 6
RES
This field sets the duty cycle that will be used
whenever PWM1 experiences a Spin-Up cycle. This
field accepts 16 possible values that are mapped to
duty cycles according the table in the Auto-Fan
Control section. Setting this field to 0h will effectively
disable Spin-Up.
Reserved
Sets the Spin-Up duration for PWM1.
PWM1 frequency control. Setting this value controls
the frequency of the PWM1 output according to the
table below.
Reserved
Bit 5
72
Bit 5
RES
Frequency of PWM1
Bit 4
Spin-up disabled
RES
or PWM2 (Hz)
Spin-Up Time
Bit 4
RES
1000 ms
2000 ms
4000 ms
100 ms
250 ms
400 ms
700 ms
22500
Description
Description
96
84
72
60
48
36
12
Bit 3
Bit 3
RES
Bit 2
Bit 2
SU_DC
Bit 1
FREQ1
Bit 1
Bit 0
Bit 0
Default
Default
Value
Value
00h
00h

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