LM93CIMT National Semiconductor, LM93CIMT Datasheet - Page 23

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LM93CIMT

Manufacturer Part Number
LM93CIMT
Description
Microprocessor Support IC
Manufacturer
National Semiconductor
Datasheets

Specifications of LM93CIMT

Peak Reflow Compatible (260 C)
No
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Supply Voltage Min
3V
Operating Temperature Min
0��C
Package / Case
56-TSSOP
Operating Temperature Max
85°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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14.0 SMBus Interface
12. The master receives byte 1 and then asserts ACK.
13. The master receives byte 2 and then asserts ACK.
14. The master receives N-3 data bytes, and asserts ACK for each one.
15. The master receives data byte N and asserts a NACK.
16. The master asserts a STOP condition to end the transaction.
Special Notes:
1. The LM93 returns 00h when address locations outside of normal address space are read.
2. Block reads do not wrap around from address FFh to 00h
3. If the master acknowledges more bytes that it requested, the LM93 continues to supply data until the master does not
4. If the master does not acknowledges a byte to prematurely abort a block read, the LM93 gets off the bus to allow the master
acknowledge a byte.
to issue a STOP signal.
1
S Slave
2
Address
A
W A Block
11
Byte
Count
(1–20h)
(N)
3
4
Read
Command
Code
(F1h)
A
(Continued)
A Byte
12
Data
Byte 1
5
Count
(2h)
A
A Start
13
Data
Byte 2
6
Register
Address
23
A
A Byte
7
Count
(1–20h)
(N)
14
A
15
Data
Byte N
A S Slave
8
15
/A
9
Address
16
P
R A
10
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A

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