ST62T15CM6 STMicroelectronics, ST62T15CM6 Datasheet - Page 13

• Manufacturer Part Number: ST62T15CM6
• Description: 8BIT MCU OTP 2K, SMD, 62T15, SOIC20
• Manufacturer: STMicroelectronics

Specifications of ST62T15CM6

• Controller Family/series: ST6
• Core Size: 8bit
• No. Of I/o's: 20
• Program Memory Size: 2KB
• Ram Memory Size: 64Byte
• Cpu Speed: 8MHz
• Oscillator Type: External Only
• No. Of Timers: 1
• Digital Ic Case: RoHS Compliant
• Peripherals: ADC,
• Rohs Compliant: No
• Processor Series: ST62T1x
• Core: ST6
• Data Bus Width: 8 bit
• Program Memory Type: EPROM
• Data Ram Size: 64 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-28
• Development Tools By Supplier: ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: In Transition

MEMORY MAP (Cont’d)
3.1.6 Data ROM Window Mechanism
The Data read-only memory window is located
from address 0040h to address 007Fh in Data
space. It allows direct reading of 64 consecutive
bytes located anywhere in program memory, be-
tween address 0000h and 0FFFh.
There are 64 blocks of 64 bytes in a 4K device:
– Block 0 is related to the address range 0000h to
– Block 1 is related to the address range 0040h to
and so on...
All the program memory can therefore be used to
store either instructions or read-only data. The
Data ROM window can be moved in steps of 64
bytes along the program memory by writing the
appropriate code in the Data ROM Window Regis-
ter (DRWR).
Figure 5. Data ROM Window
0FFFh
0000h
003Fh.
007Fh.
PROGRAM
SPACE
64-BYTE
ROM
0FFh
07Fh
000h
040h
DATA SPACE
DATA ROM
WINDOW
3.1.6.1 Data ROM Window Register (DRWR)
The DRWR can be addressed like any RAM loca-
tion in the Data Space.
This register is used to select the 64-byte block of
program memory to be read in the Data ROM win-
dow (from address 40h to address 7Fh in Data
space). The DRWR register is not cleared on re-
set, therefore it must be written to before access-
ing the Data read-only memory window area for
the first time.
Address: 0C9h — Write Only
Reset Value = xxh (undefined)
Bits 7:6 = Reserved, must be cleared.
Bits 5:0 = DRWR[5:0] Data read-only memory
Window Register Bits. These are the Data read-
only memory Window bits that correspond to the
upper bits of the data read-only memory space.
Caution: This register is undefined on reset, it is
write-only, therefore do not read it nor access it us-
ing Read-Modify-Write instructions (SET, RES,
INC and DEC).
7
-
-
DRWR5 DRWR4 DRWR3 DRWR2 DRWR1 DRWR0
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