P89LPC938FDH NXP Semiconductors, P89LPC938FDH Datasheet - Page 49

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P89LPC938FDH

Manufacturer Part Number
P89LPC938FDH
Description
MCU 8BIT 80C51 8K FLASH, TSSOP28
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC938FDH

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
26
Program Memory Size
8KB
Eeprom Memory Size
512Byte
Ram Memory Size
768Byte
Cpu Speed
18MHz
Oscillator Type
External,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Product data sheet
8.7 Clock divider
8.8 Power-down and Idle mode
criteria, the boundary limits will again be compared after all 8 MSBs have been converted.
A boundary status register (BNDSTA0) flags the channels which caused a boundary
interrupt.
The A/D converter requires that its internal clock source be in the range of 500 kHz to
3 MHz to maintain accuracy. A programmable clock divider that divides the clock
from 1 to 8 is provided for this purpose.
In Idle mode the A/D converter, if enabled, will continue to function and can cause the
device to exit Idle mode when the conversion is completed if the A/D interrupt is enabled.
In Power-down mode or Total Power-down mode, the A/D does not function. If the A/D is
enabled, it will consume power. Power can be reduced by disabling the A/D.
Rev. 01 — 25 February 2005
8-bit microcontroller with 10-bit A/D converter
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
P89LPC938
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