P89LPC938FDH NXP Semiconductors, P89LPC938FDH Datasheet - Page 33

• Manufacturer Part Number: P89LPC938FDH
• Description: MCU 8BIT 80C51 8K FLASH, TSSOP28
• Manufacturer: NXP Semiconductors

Specifications of P89LPC938FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 26
• Program Memory Size: 8KB
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 18MHz
• Oscillator Type: External,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
9397 750 14051
Product data sheet
7.20.3 Mode 2
7.20.4 Mode 3
7.20.5 Baud rate generator and selection
7.20.6 Framing error
7.20.7 Break detect
11 bits are transmitted (through TXD) or received (through RXD): start bit (logic 0), 8 data
bits (LSB first), a programmable 9
transmitted, the 9
example, the parity bit (P, in the PSW) could be moved into TB8. When data is received,
the 9
saved. The baud rate is programmable to either
determined by the SMOD1 bit in PCON.
11 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0), 8
data bits (LSB first), a programmable 9
the same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable
and is determined by the Timer 1 overflow rate or the Baud Rate Generator (described in
Section 7.20.5 “Baud rate generator and
The P89LPC938 enhanced UART has an independent Baud Rate Generator. The baud
rate is determined by a baud-rate preprogrammed into the BRGR1 and BRGR0 SFRs
which together form a 16-bit baud rate divisor value that works in a similar manner as
Timer 1 but is much more accurate. If the baud rate generator is used, Timer 1 can be
used for other timing functions.
The UART can use either Timer 1 or the baud rate generator output (see
that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is cleared. The
independent Baud Rate Generator uses OSCCLK.
Framing error is reported in the status register (SSTAT). In addition, if SMOD0 (PCON.6)
is ‘1’, framing errors can be made available in SCON.7 respectively. If SMOD0 is ‘0’,
SCON.7 is SM0. It is recommended that SM0 and SM1 (SCON.7:6) are set up when
SMOD0 is ‘0’.
Break detect is reported in the status register (SSTAT). A break is detected when
11 consecutive bits are sensed LOW. The break detect can be used to reset the device
and force the device into ISP mode.
Fig 12. Baud rate sources for UART (Modes 1, 3).
th
data bit goes into RB8 in Special Function Register SCON, while the stop bit is not
baud rate generator
timer 1 overflow
(CCLK-based)
(PCLK-based)
th
data bit (TB8 in SCON) can be assigned the value of ‘0’ or ‘1’. Or, for
Rev. 01 — 25 February 2005
2
th
SMOD1 = 1
SMOD1 = 0
data bit, and a stop bit (logic 1). When data is
th
8-bit microcontroller with 10-bit A/D converter
data bit, and a stop bit (logic 1). In fact, Mode 3 is
selection”).
1
16
or
SBRGS = 0
SBRGS = 1
1
32
of the CPU clock frequency, as
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
baud rate modes 1 and 3
P89LPC938
Figure
002aaa897
12). Note
33 of 68