P89LPC9103FTK NXP Semiconductors, P89LPC9103FTK Datasheet - Page 31
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P89LPC9103FTK
Manufacturer Part Number
P89LPC9103FTK
Description
MCU 8BIT 80C51 1K FLASH, HVSON-10
Manufacturer
NXP Semiconductors
Datasheet
1.P89LPC9103FTK.pdf
(61 pages)
Specifications of P89LPC9103FTK
Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
8
Program Memory Size
1KB
Ram Memory Size
128Byte
Cpu Speed
18MHz
Oscillator Type
Internal Only
No. Of Timers
4
No. Of Pwm
RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
P89LPC9103FTK
Manufacturer:
BROADCOM
Quantity:
201
Company:
Part Number:
P89LPC9103FTKЈ¬115
Manufacturer:
NXP
Quantity:
910
NXP Semiconductors
Table 10.
[1]
P89LPC9102_9103_9107_3
Product data sheet
Clock source
On-chip oscillator or watchdog
oscillator
External clock input
Fig 14. Interrupt sources, interrupt enables, and power-down wake-up sources (P89LPC9103/9107)
Required for operation above 12 MHz.
Number of I/O pins available
(RTCCON.1)
8.12.1 Port configurations
WDOVF
8.12 I/O ports
ERTC
RTCF
The P89LPC9102/9103/9107 has either 6, 7, or 8 I/O pins depending on the reset pin
option and clock source option chosen. Refer to
All but one I/O port pin on the P89LPC9102/9103/9107 may be configured by software to
one of four types on a bit-by-bit basis. These are: quasi-bidirectional (standard 80C51 port
outputs), push-pull, open drain, and input-only. Two configuration registers for each port
select the output type for each port pin.
P1.5 (RST) can only be an input and cannot be configured.
ENADCI1
ADCI1
BNDI1
ENBI1
Reset option
No external reset (except during
power-up)
External RST pin supported
No external reset (except during
power-up)
External RST pin supported
EAD
TI and RI/RI
EA (IE0.7)
ES/ESR
EWDRT
EKBI
KBIF
CMF
BOF
EBO
EST
TF1
ET1
TF0
ET0
EC
TI
Rev. 03 — 10 July 2007
8-bit microcontrollers with two-clock accelerated 80C51 core
[1]
P89LPC9102/9103/9107
Number of I/O pins
(10-pin package)
8
7
7
6
Table
10.
wake-up
(if in power-down)
Number of I/O pins
(14-pin package)
10
9
9
8
002aaa977
interrupt
to CPU
© NXP B.V. 2007. All rights reserved.
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