AC80566UC005DE S LB2C Intel, AC80566UC005DE S LB2C Datasheet - Page 72

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AC80566UC005DE S LB2C

Manufacturer Part Number
AC80566UC005DE S LB2C
Description
MPU, ATOM PROCESSOR, Z510, U-FCBGA
Manufacturer
Intel
Series
ATOM - Z5xxr
Datasheet

Specifications of AC80566UC005DE S LB2C

Core Size
32bit
Program Memory Size
512KB
Cpu Speed
400MHz
Digital Ic Case Style
FCBGA
No. Of Pins
441
Supply Voltage Range
0.75V To 1.1V
Operating Temperature Range
0°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.1.3
5.1.4
5.1.5
72
Digital Thermal Sensor
The processor also contains an on die Digital Thermal Sensor (DTS) that is read using
an MSR (no I/O interface). The processor has a unique digital thermal sensor that’s
temperature is accessible using the processor MSRs. The DTS is the preferred method
of reading the processor die temperature since it can be located much closer to the
hottest portions of the die and can thus more accurately track the die temperature
and potential activation of processor core clock modulation using the Thermal Monitor.
The DTS is only valid while the processor is in the normal operating state (the Normal
package level low power state).
Unlike traditional thermal devices, the DTS outputs a temperature relative to the
maximum supported operating temperature of the processor (T
responsibility of software to convert the relative temperature to an absolute
temperature. The temperature returned by the DTS will always be at or below T
Catastrophic temperature conditions are detectable using an Out Of Spec status bit.
This bit is also part of the DTS MSR. When this bit is set, the processor is operating
out of specification and immediate shutdown of the system should occur. The
processor operation and code execution is not ensured once the activation of the “Out
of Spec” status bit is set.
The DTS-relative temperature readout corresponds to the Thermal Monitor (TM1/TM2)
trigger point. When the DTS indicates maximum processor core temperature has been
reached, the TM1 or TM2 hardware thermal control mechanism will activate. The DTS
and TM1/TM2 temperature may not correspond to the thermal diode reading since the
thermal diode is located in a separate portion of the die and thermal gradient from the
core DTS. Additionally, the thermal gradient from DTS to thermal diode can vary
substantially due to changes in processor power, mechanical and thermal attach, and
software application. The system designer is required to use the DTS to ensure proper
operation of the processor within its temperature operating specifications.
Changes to the temperature can be detected using two programmable thresholds
located in the processor MSRs. These thresholds have the capability of generating
interrupts using the core's local APIC. Refer to the Intel® 64 and IA-32 Architectures
Software Developer's Manuals for specific register and programming details.
Out of Specification Detection
Overheat detection is performed by monitoring the processor temperature and
temperature gradient. This feature is intended for graceful shut down before the
THERMTRIP# is activated. If the processor’s TM1 or TM2 are triggered and the
temperature remains high, an “Out Of Spec” status and sticky bit are latched in the
status MSR register and generates thermal interrupt.
PROCHOT# Signal Pin
An external signal, PROCHOT# (processor hot), is asserted when the processor die
temperature has reached its maximum operating temperature. If TM1 or TM2 is
enabled, then the TCC will be active when PROCHOT# is asserted. The processor can
be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#. Refer to the Intel® 64 and IA-32 Architectures Software Developer's
Manuals.
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