AC80566UC005DE S LB2C Intel, AC80566UC005DE S LB2C Datasheet - Page 28

• Manufacturer Part Number: AC80566UC005DE S LB2C
• Description: MPU, ATOM PROCESSOR, Z510, U-FCBGA
• Manufacturer: Intel
• Series: ATOM - Z5xxr

Specifications of AC80566UC005DE S LB2C

• Core Size: 32bit
• Program Memory Size: 512KB
• Cpu Speed: 400MHz
• Digital Ic Case Style: FCBGA
• No. Of Pins: 441
• Supply Voltage Range: 0.75V To 1.1V
• Operating Temperature Range: 0°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3
3.3.1
3.3.2
3.4
3.5
28
Decoupling Guidelines
Due to its large number of transistors and high internal clock speeds, the processor is
capable of generating large average current swings between low and full power states.
This may cause voltages on power planes to sag below their minimum values if bulk
decoupling is not adequate. Larger bulk storage, such as electrolytic capacitors,
supplies current during longer lasting changes in current demand by the component
(such as, coming out of an idle condition). Similarly, they act as storage well for
current when entering an idle condition from a running condition. Care must be taken
in the board design to ensure that the voltage provided to the processor remains
within the specifications listed in Table
result in timing violations or reduced lifetime of the component.
V
V
Resistance (ESR) and keep a low interconnect resistance from the regulator to the
socket. Bulk decoupling for the large current swings when the part is powering on or
entering/exiting low-power states must be provided by the voltage regulator solution.
FSB AGTL+ Decoupling
The processor integrates signal termination on the die. Decoupling must also be
provided by the system motherboard for proper AGTL+ bus operation.
FSB Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the FSB interface speed as well as the core frequency of
the processor. As in previous generation processors, the processor core frequency is a
multiple of the BCLK[1:0] frequency. The processor bus ratio multiplier will be set at
its default ratio at manufacturing. The processor uses a differential clocking
implementation.
Voltage Identification and Power Sequencing
The processor uses seven voltage identification pins (VID[6:0]) to support automatic
selection of power supply voltages. The VID pins for the processor are CMOS outputs
driven by the processor VID circuitry. Table 3 specifies the voltage level corresponding
to the state of VID[6:0]. A “1” (one) in this refers to a high-voltage level and a “0”
(zero) refers to low-voltage level.
Power source characteristics must be stable whenever the supply to the voltage
regulator is stable.
CC
CC
regulator solutions need to provide bulk capacitance with a low Effective Series
Decoupling
7,
Table 7, and Table 7. Failure to do so can
Electrical Specifications
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