PIC32MX795F512L-80I/BG Microchip Technology, PIC32MX795F512L-80I/BG Datasheet - Page 25
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX795F512L-80I/BG
Manufacturer Part Number
PIC32MX795F512L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX795F512L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
CAN, I2C, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
512 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX795F512L-80I/BG
Manufacturer:
Microchip
Quantity:
316
Company:
Part Number:
PIC32MX795F512L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
14.0
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. The Configuration registers are
verified with the rest of the code.
14.1
Memory verify is performed using the GET_CRC
command (see Table 16-3) as shown below.
FIGURE 14-1:
The following steps are required to verify memory using
the PE:
1.
2.
3.
4.
Verify that valCkSum matches the checksum of the
copy held in the programmer’s buffer.
14.2
Reading from Flash memory is performed by executing
a series of read accesses from the Fastdata register.
Table 19-4 shows the EJTAG programming details,
including the address and opcode data for performing
processor access operations.
© 2010 Microchip Technology Inc.
Note:
XferFastData (GET_CRC).
XferFastData (start_Address).
XferFastData (length).
valCkSum = XferFastData (32’h0x0).
VERIFY DEVICE MEMORY
Verifying Memory with the PE
Verifying Memory without the PE
Because
include the device code protection bit,
code memory should be verified immedi-
ately after writing (if code protection is
enabled). This is because the device will
not be readable or verifiable if a device
Reset occurs after the code-protect bit has
been cleared.
Issue Verify Command
Receive Response
VERIFYING MEMORY
WITH THE PE
the
Configuration
registers
FIGURE 14-2:
The following steps are required to verify memory:
1.
2.
3.
4.
TABLE 14-1:
Opcode
Step 1: Initialize some constants.
3c04bf80
Step 2: Read memory Location.
3c08<ADDR>
3508<ADDR>
Step 3: Write to Fastdata location.
8d090000
ae690000
Step 4: Read data from Fastdata register
Step 5: Repeat Steps 2-4 until all configuration
XferInstruction
Repeat Step 1 until the last instruction is
transferred to the CPU.
Verify that valRead matches the copy held in the
programmer’s buffer.
Repeat Steps 1-3 for each memory location.
No
0xFF200000.
locations are read.
Instruction
lui $s3, 0xFF20
lui $t0,<FLASH_WORD_ADDR(31:16)>
ori $t0,<FLASH_WORD_ADDR(15:0)>
lw $t1, 0($t0)
sw $t1, 0($s3)
VERIFY DEVICE OPCODES
Read Memory Location
(opcode).
VERIFYING MEMORY
WITHOUT THE PE
Verify Location
Done
PIC32MX
DS61145G-page 25