PIC32MX795F512L-80I/BG Microchip Technology, PIC32MX795F512L-80I/BG Datasheet - Page 22
![IC, 32BIT MCU, PIC32, 80MHZ, BGA-100](/photos/12/13/121347/121-xbga_sml.jpg)
PIC32MX795F512L-80I/BG
Manufacturer Part Number
PIC32MX795F512L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX795F512L-80I/BG
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
CAN, I2C, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
512 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX795F512L-80I/BG
Manufacturer:
Microchip
Quantity:
316
Company:
Part Number:
PIC32MX795F512L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX
12.0
To program a block of data to the PIC32MX device, it
must first be loaded into SRAM.
12.1
To program a block of memory without the use of the
PE, the block of data must first be written to RAM. This
method requires the programmer to transfer the actual
machine instructions with embedded data for writing
the block of data to the devices internal RAM memory.
FIGURE 12-1:
The following steps are required to download a block of
data:
1.
2.
DS61145G-page 22
XferInstruction
Repeat Step 1 until the last instruction is
transferred to CPU.
No
DOWNLOADING A DATA
BLOCK
Without the PE
bufAddr = RAM Buffer Address
Write 32-bit Data to bufAddr
Increment bufAddr
(opcode).
DOWNLOADING DATA
WITHOUT THE PE
Done
TABLE 12-1:
12.2
When using the PE, the code memory is programmed
with the PROGRAM command (see Table 16-3). The
program can program up to one row of code memory
starting from the memory address specified in the
command. The number of PROGRAM commands
required to program a device depends on the number
of write blocks that must be programmed in the device.
FIGURE 12-2:
The following steps are required to download a block of
data using the PE:
1.
2.
3.
Opcode
Step 1: Initialize SRAM Base Address to
3c10a000
Step 2: Write the entire row of data to be
3c08<DATA>
3508<DATA>
ae08<OFFSET>
Step3:
XferFastData (PROGRAM|DATA_SIZE).
XferFastData (ADDRESS).
response = XferFastData (32’h0x00).
With the PE
0xA000_0000
programmed into system SRAM.
Repeat Step 2 until one row of data has
been loaded.
Issue Download Data Command
Receive Response
DOWNLOAD DATA OPCODES
Instruction
lui
lui
ori
sw
DOWNLOADING DATA
WITH THE PE
// OFFSET increments by 4
© 2010 Microchip Technology Inc.
$s0, 0xA000;
$t0, <DATA(31:16)>;
$t0, <DATA(15:0)>;
$t0, <OFFSET>($s0);