LPC2364FBD100 NXP Semiconductors, LPC2364FBD100 Datasheet - Page 51

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LPC2364FBD100

Manufacturer Part Number
LPC2364FBD100
Description
IC, 32BIT MCU, ARM7, 72MHZ, LQFP-100
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC2364FBD100

Controller Family/series
(ARM7)
No. Of I/o's
70
Ram Memory Size
34KB
Cpu Speed
72MHz
No. Of Timers
4
No. Of Pwm Channels
6
Core Size
32 Bit
Program Memory Size
128KB
Embedded Interface Type
CAN, SPI, USB, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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NXP Semiconductors
LPC2364_65_66_67_68_6
Product data sheet
Fig 17. LPC2364/66/68 USB interface on a bus-powered device
13.2 XTAL1 input
13.3 XTAL and RTC Printed-Circuit Board (PCB) layout guidelines
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
capacitor to ground C
slave mode, a minimum of 200 mV (RMS) is needed. For more details see the LPC24xx
User manual UM10237.
The crystal should be connected on the PCB as close as possible to the oscillator input
and output pins of the chip. Take care that the load capacitors C
case of third overtone crystal usage, have a common ground plane. The external
components must also be connected to the ground plain. Loops must be made as small
as possible, in order to keep the noise coupled in via the PCB as small as possible. Also
parasitics should stay as small as possible. Values of C
smaller accordingly to the increase in parasitics of the PCB layout.
Fig 18. Slave mode operation of the on-chip oscillator
i
= 100 pF. To limit the input voltage to the specified range, choose an additional
LPC23XX
V
USB_UP_LED
V
USB_D+
USB_D−
V
g
Rev. 06 — 1 February 2010
DD(3V3)
BUS
SS
which attenuates the input voltage by a factor C
R S = 33 Ω
R S = 33 Ω
R2
R1
1.5 kΩ
XTAL1
LPC2xxx
C i
100 pF
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
002aae718
C g
002aac579
x1
and C
USB-B
connector
x2
x1
should be chosen
and C
i
© NXP B.V. 2010. All rights reserved.
/ (C
x2
, and C
i
+ C
g
). In
x3
51 of 59
in

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