HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 16

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.5 Operation in Clock Synchronous Mode............................................................................. 303
16.6 Multiprocessor Communication Function.......................................................................... 310
16.7 Interrupts............................................................................................................................ 317
16.8 Usage Notes ....................................................................................................................... 318
Section 17 I
17.1 Features.............................................................................................................................. 321
17.2 Input/Output Pins............................................................................................................... 323
17.3 Register Descriptions......................................................................................................... 324
17.4 Operation ........................................................................................................................... 337
Rev. 1.00 Sep. 16, 2005 Page xvi of xxx
16.4.3 Data Transmission ................................................................................................ 297
16.4.4 Serial Data Reception ........................................................................................... 299
16.5.1 Clock..................................................................................................................... 303
16.5.2 SCI3 Initialization................................................................................................. 303
16.5.3 Serial Data Transmission ...................................................................................... 304
16.5.4 Serial Data Reception (Clock Synchronous Mode) .............................................. 306
16.5.5 Simultaneous Serial Data Transmission and Reception........................................ 308
16.6.1 Multiprocessor Serial Data Transmission ............................................................. 311
16.6.2 Multiprocessor Serial Data Reception .................................................................. 313
16.8.1 Break Detection and Processing ........................................................................... 318
16.8.2 Mark State and Break Sending ............................................................................. 318
16.8.3 Receive Error Flags and Transmit Operations
16.8.4 Receive Data Sampling Timing and Reception Margin
17.3.1 I
17.3.2 I
17.3.3 I
17.3.4 I
17.3.5 I
17.3.6 Slave Address Register (SAR).............................................................................. 335
17.3.7 I
17.3.8 I
17.3.9 I
17.4.1 I
17.4.2 Master Transmit Operation................................................................................... 338
17.4.3 Master Receive Operation .................................................................................... 340
17.4.4 Slave Transmit Operation ..................................................................................... 342
17.4.5 Slave Receive Operation....................................................................................... 344
17.4.6 Clock Synchronous Serial Format ........................................................................ 346
(Clock Synchronous Mode Only) ......................................................................... 318
in Asynchronous Mode......................................................................................... 319
2
2
2
2
2
2
2
2
2
2
C Bus Control Register 1 (ICCR1)..................................................................... 324
C Bus Control Register 2 (ICCR2)..................................................................... 327
C Bus Mode Register (ICMR)............................................................................ 328
C Bus Interrupt Enable Register (ICIER)........................................................... 330
C Bus Status Register (ICSR)............................................................................. 332
C Bus Transmit Data Register (ICDRT) ............................................................ 336
C Bus Receive Data Register (ICDRR).............................................................. 336
C Bus Shift Register (ICDRS)............................................................................ 336
C Bus Format...................................................................................................... 337
C Bus Interface 2 (IIC2)................................................................ 321