PIC16F1827-I/MQ Microchip Technology, PIC16F1827-I/MQ Datasheet - Page 24

IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28

PIC16F1827-I/MQ

Manufacturer Part Number
PIC16F1827-I/MQ
Description
IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
Manufacturer
Microchip Technology
Datasheet

Specifications of PIC16F1827-I/MQ

Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
384Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
4 Kwords
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Data Ram Size
384 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN EP
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / Rohs Status
 Details
PIC16F/LF1826/27
3.2.2
The Special Function Registers are registers used by
the application to control the desired operation of
peripheral functions in the device. The registers asso-
ciated with the operation of the peripherals are
described in the appropriate peripheral chapter of this
data sheet.
3.2.3
There are up to 80 bytes of GPR in each data memory
bank.
3.2.3.1
The general purpose RAM can be accessed in a
non-banked method via the FSRs. This can simplify
access to large memory structures. See Section 3.5.2
“Linear Data Memory” for more information.
3.2.4
There are 16 bytes of common RAM accessible from all
banks.
FIGURE 3-3:
DS41391B-page 24
7-bit Bank Offset
SPECIAL FUNCTION REGISTER
GENERAL PURPOSE RAM
COMMON RAM
Linear Access to GPR
0Bh
0Ch
1Fh
6Fh
7Fh
00h
20h
70h
Special Function Registers
BANKED MEMORY
PARTITIONING
General Purpose RAM
(20 bytes maximum)
(80 bytes maximum)
Memory Region
Core Registers
Common RAM
(12 bytes)
(16 bytes)
Preliminary
3.2.5
The memory maps for the device family are as shown
in Table 3-2.
TABLE 3-2:
PIC16F/LF1826/27
Device
DEVICE MEMORY MAPS
MEMORY MAP TABLES
© 2009 Microchip Technology Inc.
Banks
16-23
24-31
8-15
0-7
31
Table No.
Table 3-3
Table 3-4
Table 3-5
Table 3-6
Table 3-7

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