PIC12LF1822-I/MF Microchip Technology, PIC12LF1822-I/MF Datasheet - Page 265
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12LF1822-I/MF
Manufacturer Part Number
PIC12LF1822-I/MF
Description
IC, 8BIT MCU, PIC12, 32MHZ, DFN-8
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets
1.PIC12F1822T-ISN.pdf
(404 pages)
2.PIC12F1822T-ISN.pdf
(10 pages)
3.PIC12F1822-IMF.pdf
(398 pages)
Specifications of PIC12LF1822-I/MF
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
256Byte
Ram Memory Size
128Byte
Cpu Speed
32MHz
No. Of Timers
3
Core Size
8 Bit
Program Memory Size
3.5KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Processor Series
PIC12LF
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12LF1822-I/MF
Manufacturer:
MICROCHIP
Quantity:
3 600
- Current page: 265 of 404
- Download datasheet (4Mb)
25.6.4
To initiate a Start condition, the user sets the Start
Enable bit, SEN bit of the SSP1CON2 register. If the
SDA and SCL pins are sampled high, the Baud Rate
Generator
SSP1ADD<7:0> and starts its count. If SCL and SDA
are both sampled high when the Baud Rate Generator
times out (T
of the SDA being driven low while SCL is high is the
Start condition and causes the S bit of the SSP1STAT1
register to be set. Following this, the Baud Rate Gen-
erator is reloaded with the contents of SSP1ADD<7:0>
and resumes its count. When the Baud Rate Genera-
tor times out (T
FIGURE 25-26:
2010 Microchip Technology Inc.
I
CONDITION TIMING
2
C MASTER MODE START
BRG
is
), the SDA pin is driven low. The action
BRG
reloaded
), the SEN bit of the SSP1CON2
FIRST START BIT TIMING
Write to SEN bit occurs here
with
SDA
SCL
the
PIC12F/LF1822/PIC16F/LF1823
contents
SDA = 1,
SCL = 1
T
BRG
Preliminary
of
S
Set S bit (SSP1STAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
register will be automatically cleared by hardware; the
Baud Rate Generator is suspended, leaving the SDA
line held low and the Start condition is complete.
and sets SSP1IF bit
Note 1: If at the beginning of the Start condition,
Write to SSP1BUF occurs here
T
BRG
2: The Philips I
1st bit
the SDA and SCL pins are already sam-
pled low, or if during the Start condition,
the SCL line is sampled low before the
SDA line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCL1IF, is set, the Start condition is
aborted and the I
its Idle state.
bus collision cannot occur on a Start.
T
BRG
2
C Specification states that a
2nd bit
2
C module is reset into
DS41413B-page 265
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