PIC18LF8680-I/PT Microchip Technology, PIC18LF8680-I/PT Datasheet - Page 357

• Manufacturer Part Number: PIC18LF8680-I/PT
• Description: IC, 8BIT MCU, PIC18LF, 40MHZ, PLCC-64
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8680-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 39
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3328Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 32768 Words
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Rohs Compliant: Yes
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3328 B
• Interface Type: I2C, SPI, AUSART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

24.2
The Watchdog Timer is a free-running, on-chip RC
oscillator which does not require any external compo-
nents. This RC oscillator is separate from the RC
oscillator of the OSC1/CLKI pin. That means that the
WDT will run even if the clock on the OSC1/CLKI and
OSC2/CLKO/RA6 pins of the device has been stopped,
for example, by execution of a SLEEP instruction.
During normal operation, a WDT time-out generates a
device Reset (Watchdog Timer Reset). If the device is
in Sleep mode, a WDT time-out causes the device to
wake-up and continue with normal operation (Watch-
dog Timer wake-up). The TO bit in the RCON register
will be cleared upon a WDT time-out.
The Watchdog Timer is enabled/disabled by a device
configuration bit. If the WDT is enabled, software
execution may not disable this function. When the
WDTEN configuration bit is cleared, the SWDTEN bit
enables/disables the operation of the WDT.
REGISTER 24-15: WDTCON REGISTER
 2004 Microchip Technology Inc.
Watchdog Timer (WDT)
bit 7-1
bit 0
bit 7
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is turned off if the WDTEN configuration bit in the Configuration register = 0
Legend:
R = Readable bit
- n = Value at POR
U-0
—
U-0
—
PIC18F6585/8585/6680/8680
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
The WDT time-out period values may be found in
Section 27.0 “Electrical Characteristics” under
parameter #31. Values for the WDT postscaler may be
assigned using the configuration bits.
24.2.1
Register 24-15 shows the WDTCON register. This is a
readable and writable register which contains a control
bit that allows software to override the WDT enable
configuration bit, only when the configuration bit has
disabled the WDT.
—
Note 1: The CLRWDT and SLEEP instructions
2: When a CLRWDT instruction is executed
CONTROL REGISTER
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
clear the WDT and the postscaler if
assigned to the WDT and prevent it from
timing out and generating a device Reset
condition.
and the postscaler is assigned to the
WDT, the postscaler count will be cleared
but the postscaler assignment is not
changed.
—
U-0
—
x = Bit is unknown
U-0
—
DS30491C-page 355
SWDTEN
R/W-0
bit 0