PIC18LF8680-I/PT Microchip Technology, PIC18LF8680-I/PT Datasheet - Page 151

• Manufacturer Part Number: PIC18LF8680-I/PT
• Description: IC, 8BIT MCU, PIC18LF, 40MHZ, PLCC-64
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8680-I/PT

• Controller Family/series: PIC18
• No. Of I/o's: 39
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3328Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Core Size: 8 Bit
• Program Memory Size: 32768 Words
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Rohs Compliant: Yes
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3328 B
• Interface Type: I2C, SPI, AUSART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

10.9
PORTJ is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISJ. Setting a
TRISJ bit (= 1) will make the corresponding PORTJ pin
an input (i.e., put the corresponding output driver in a
high-impedance mode). Clearing a TRISJ bit (= 0) will
make the corresponding PORTJ pin an output (i.e., put
the contents of the output latch on the selected pin).
The Data Latch register (LATJ) is also memory
mapped. Read-modify-write operations on the LATJ
register read and write the latched output value for
PORTJ.
PORTJ is multiplexed with the system bus as the
external memory interface; I/O port functions are only
available when the system bus is disabled. When
operating as the external memory interface, PORTJ
provides the control signal to external memory devices.
The RJ5 pin is not multiplexed with any system bus
functions.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTJ pin. Some
peripherals override the TRIS bit to make a pin an
output, while other peripherals override the TRIS bit to
make a pin an input. The user should refer to the
corresponding peripheral section for the correct TRIS
bit settings.
The pin override value is not loaded into the TRIS reg-
ister. This allows read-modify-write of the TRIS register
without concern due to peripheral overrides.
EXAMPLE 10-9:
 2004 Microchip Technology Inc.
CLRF
CLRF
MOVLW
MOVWF
Note:
Note:
PORTJ, TRISJ and LATJ
Registers
PORTJ
LATJ
0CFh
TRISJ
PORTJ is available only on PIC18F8X8X
devices.
On a Power-on Reset, these pins are
configured as digital inputs.
; Initialize PORTG by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RJ3:RJ0 as inputs
; RJ5:RJ4 as output
; RJ7:RJ6 as inputs
INITIALIZING PORTJ
PIC18F6585/8585/6680/8680
FIGURE 10-25:
Note 1: I/O pins have diode protection to V
RD LATJ
Data
Bus
WR LATJ
or
PORTJ
RD TRISJ
RD PORTJ
WR TRISJ
TRIS Latch
Data Latch
D
D
CK
CK
PORTJ BLOCK DIAGRAM
IN I/O MODE
Q
Q
Q
EN
DS30491C-page 149
Schmitt
Trigger
Input
Buffer
EN
D
DD
and V
I/O pin
SS
.
(1)