SST25LF020A-33-4I-SAE SILICON STORAGE TECHNOLOGY, SST25LF020A-33-4I-SAE Datasheet - Page 4

• Manufacturer Part Number: SST25LF020A-33-4I-SAE
• Description: 2M FLASH MEMORY, SPI EEPROM, SOIC8
• Manufacturer: SILICON STORAGE TECHNOLOGY

Specifications of SST25LF020A-33-4I-SAE

• Memory Size: 2Mbit
• Clock Frequency: 33MHz
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Svhc: No SVHC (18-Jun-2010)
• Device: RoHS Compliant
• Package / Case: SOIC
• Memory Type: Flash
• Memory Configuration: 256K X 8
• Interface Type: Serial, SPI
• Rohs Compliant: Yes

Data Sheet
PRODUCT IDENTIFICATION
TABLE 2: P
MEMORY ORGANIZATION
The SST25LF020A/040A SuperFlash memory array is
organized in 4 KByte sectors with 32 KByte overlay blocks.
©2006 Silicon Storage Technology, Inc.
Manufacturer’s ID
Device ID
FIGURE 2: SPI P
SST25LF020A
SST25LF040A
SCK
CE#
SO
SI
RODUCT
MODE 3
MODE 0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
ROTOCOL
I
DENTIFICATION
HIGH IMPEDANCE
Address
00000H
00001H
00001H
Data
BFH
43H
44H
T2.0 1242
4
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
DEVICE OPERATION
The SST25LF020A/040A is accessed through the SPI
(Serial Peripheral Interface) bus compatible protocol. The
SPI bus consist of four control lines; Chip Enable (CE#) is
used to select the device, and data is accessed through the
Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK).
The SST25LF020A/040A supports both Mode 0 (0,0) and
Mode 3 (1,1) of SPI bus operations. The difference
between the two modes, as shown in Figure 2, is the state
of the SCK signal when the bus master is in Stand-by
mode and no data is being transferred. The SCK signal is
low for Mode 0 and SCK signal is high for Mode 3. For both
modes, the Serial Data In (SI) is sampled at the rising edge
of the SCK clock signal and the Serial Data Output (SO) is
driven after the falling edge of the SCK clock signal.
2 Mbit / 4 Mbit SPI Serial Flash
DON'T CARE
SST25LF020A / SST25LF040A
MODE 3
MODE 0
1242 F02.0
S71242-05-000
1/06