M52S128168A-7.5TG ELITE SEMICONDUCTOR, M52S128168A-7.5TG Datasheet - Page 44

IC, SDRAM, 128MBIT, 133MHZ, TSOP-54

M52S128168A-7.5TG

Manufacturer Part Number
M52S128168A-7.5TG
Description
IC, SDRAM, 128MBIT, 133MHZ, TSOP-54
Manufacturer
ELITE SEMICONDUCTOR
Datasheet

Specifications of M52S128168A-7.5TG

Memory Type
DRAM - Sychronous
Memory Configuration
2M X 16
Ic Interface Type
Parallel
Memory Case Style
TSOP
No. Of Pins
54
Operating Temperature Range
0°C To +70°C
Frequency
133MHz
Filter Terminals
SMD
Rohs Compliant
Yes
Page Size
128MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ESMT
Mode Register Set Cycle
C L O C K
All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
*Note : 1. CS , RAS , CAS , & WE activation at the same clock cycle with address key will set internal
Elite Semiconductor Memory Technology Inc.
A D D R
C K E
A 1 0
B A 1
B A 0
D Q M
C A S
R A S
W E
C S
D Q
MODE REGISTER SET CYCLE
2. Minimum 2 clock cycles should be met before new RAS activation.
3. Please refer to Mode Register Set table.
mode register.
0
1
M R S
K e y
* N o t e 2
* N o t e 1
* N o t e 3
2
H I - Z
H I G H
C o m m a n d
3
N e w
R a
B S
B S
4
5
6
Extended Mode Register Set Cycle
C L O C K
A D D R
C K E
A 1 0
D Q M
B A 1
B A 0
C A S
R A S
W E
C S
D Q
0
1
E M R S
K e y
* N o t e 2
* N o t e 1
* N o t e 3
2
H I - Z
Publication Date: Oct. 2007
Revision: 1.1
H I G H
C o m m a n d
3
N e w
R a
B S
B S
M52S128168A
4
: D o n ' t C a r e
5
6
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